Method for indirect measurement of the phase delay of a RF-PWM modulator

Patent metadata

Field	Value
Publication number	US-9426005-B1
Application number	US-201514795159-A
Country	US
Kind code	B1
Filing date	Jul 9, 2015
Priority date	Jul 9, 2015
Publication date	Aug 23, 2016
Grant date	Aug 23, 2016

Abstract

A delay measurement system to measure a phase delay of a Radio Frequency-Pulse Width Modulated (RF-PWM) signal introduced in a Radio Frequency-Pulse Width Modulator, wherein the RF-PWM signal comprises a sampling frequency and at least one carrier period, and wherein the RF-PWM signal has a symbol in the at least one carrier period. The delay measurement system comprises a first phase modulator circuit configured to generate a first Binary Phase Shifted (BPS) signal having a first period and a second period based upon the RF-PWM signal, wherein the first period of the BPS signal has the symbol therein and the second period of the BPS signal has a 180 degree inverted version of the symbol. The delay measurement system further comprises a second phase modulator circuit configured to generate a second Binary Phase Shifted (BPS) signal having a first period and a second period, wherein the first period of the BPS signal has the symbol therein and the second period of the BPS signal has a 180 degree inverted version of the symbol. Further, the delay measurement system comprises a detector circuit configured to determine the phase delay of the RF-PWM signal based on the first BPS signal or the second BPS signal and output the phase delay.

First claim

What is claimed is:

1. A delay measurement system to measure a phase delay of a Radio Frequency-Pulse Width Modulated (RF-PWM) signal introduced in a Radio Frequency Pulse Width Modulator, wherein the RF-PWM signal comprises a sampling frequency and at least one carrier period, and wherein the RF-PWM signal has a symbol in the at least one carrier period, the delay measurement system comprising:
a first phase modulator circuit configured to generate a first Binary Phase Shifted (BPS) signal having a first period and a second period based upon the RF-PWM signal, wherein the first period of the BPS signal has the symbol therein and the second period of the BPS signal has a 180 degree inverted version of the symbol;
a second phase modulator circuit configured to generate a second Binary Phase Shifted (BPS) signal having a first period and a second period, wherein the first period of the BPS signal has the symbol therein and the second period of the BPS signal has a 180 degree inverted version of the symbol; and
a detector circuit configured to determine the phase delay of the RF-PWM signal based on the first BPS signal or the second BPS signal and output the phase delay.

2. The delay measurement system of claim 1 ,
wherein the detector circuit comprises an edge counting circuit configured to receive the first BPS signal or the second BPS signal and generate an edge count of the first BPS signal or the second BPS signal in a time frame defined by the first period and the second period.

3. The delay measurement system of claim 2 ,
wherein the edge counting circuit is configured to generate the edge count of one or more rising edges, or one or more falling edges, or both the rising edges and the falling edges of the first BPS signal or the second BPS signal.

4. The delay measurement system of claim 2 ,
wherein the detector circuit comprises a determinator circuit configured to determine and output the phase delay based on the edge count generated by the edge counting circuit.

5. The delay measurement system of claim 1 ,
wherein the detector circuit further comprises a measuring circuit configured to measure a metric of the first BPS signal or the second BPS signal in a time frame defined by the first period and the second period.

6. The delay measurement system of claim 5 ,
wherein the detector circuit further comprises a determinator circuit configured to determine and output the phase delay based on the metric measured by the measuring circuit.

7. The delay measurement system of claim 5 ,
wherein the metric measured by the measuring circuit is an amplitude of the first BPS signal or the second BPS signal at half an output frequency of a Local Oscillator circuit associated with the first phase modulator circuit and the second phase modulator circuit.

8. The delay measurement system of claim 5 ,
wherein the measuring circuit is an oscilloscope, a spectrum analyzer, a signal analyzer, a network analyzer, a multimeter, a wattmeter, a voltmeter or an internal analysis circuit of the delay measurement system.

9. The delay measurement system of claim 1 ,
wherein the detector circuit further comprises a control signal generator configured to generate a phase offset control signal, wherein the phase offset control signal offsets a phase of the first phase modulator and the second phase modulator.

10. A method to measure a phase delay of a Radio Frequency-Pulse Width Modulated (RF-PWM) signal introduced by a Radio Frequency-Pulse Width Modulator, wherein the RF-PWM signal comprises a sampling frequency and at least one carrier period, and wherein the RF-PWM signal has a symbol in the at least one career period, the method comprising:
generating, by a first phase modulator circuit, a first Binary Phase Shifted (BPS) signal having a first period and a second period based upon the RF-PWM signal, wherein the first period of the BPS signal has the symbol therein and the second period of the BPS signal has a 180 degree inverted version of the symbol;
generating, by a second phase modulator circuit, a second Binary Phase Shifted (BPS) signal having a first period and a second period based upon the RF-PWM signal, wherein the first period of the BPS signal has the symbol therein and the second period of the BPS signal has a 180 degree inverted version of the symbol; and
determining, by a detector circuit, the phase delay of the RF-PWM signal based on the first signal or the second BPS signal and output the phase delay.

11. The method of claim 10 , further comprising:
generating, by an edge counting circuit, an edge count of the first BPS signal or the second BPS signal in a time frame defined by the first period and the second period.

12. The method of claim 11 , further comprising:
generating an edge count of one or more rising edges, or one or more falling edges, or both the rising edges and the falling edges of the first BPS signal or the second BPS signal.

13. The method of claim 11 , further comprising:
determining, by a determinator circuit, the phase delay based on the edge count generated by the edge counting circuit.

14. The method of claim 10 , further comprising:
measuring, by a measuring circuit, a metric of the first BPS signal or the second BPS signal in a time frame defined by the first period and the second period.

15. The method of claim 14 , further comprising:
determining, by a determinator circuit, the phase delay based on the metric measured by the measuring circuit.

16. The method of claim 14 ,
wherein the metric measured is an amplitude of the first BPS signal or the second BPS signal at half an output frequency of a Local Oscillator circuit associated with the first phase modulator circuit and the second phase modulator circuit.

17. The method of claim 10 , further comprising:
generating, by a control signal generator, a phase offset control signal, wherein the phase offset control signal offsets a phase of the first phase modulator and the second phase modulator.

18. An estimator circuit to estimate a phase delay in a RF-PWM modulator, wherein the RF-PWM modulator generates a BPS signal, and wherein the BPS signal comprises a first period and a second period, wherein the first period has a symbol therein and the second period has a 180 degree inverted version of the symbol, the estimator circuit comprising:
a detector circuit configured to receive the BPS signal and determine the phase delay in the BPS signal; and
a control signal generator configured to generate a phase offset control signal, wherein the phase offset control signal offsets a phase of the RF-PWM modulator.

19. The estimator circuit of claim 18 ,
wherein the detector circuit comprises an edge counting circuit configured to generate an edge count of the BPS signal in a time frame defined by the first period and the second period.

20. The estimator circuit of claim 18 ,
wherein the detector circuit comprises a measuring circuit configured to measure a metric of the BPS signal in a time frame defined by the first period and the second period.

Assignees

• Infineon Technologies Ag

Inventors

• Galanopoulos Kostas
• Seebacher David

Classifications

• H04L25/4902 Primary

  Pulse width modulation; Pulse position modulation · CPC title

• H04L25/06

  DC level restoring means; Bias distortion correction {; Decision circuits providing symbol by symbol detection} · CPC title

• H03L7/06

  using a reference signal applied to a frequency- or phase-locked loop · CPC title

• H03L7/085 Primary

  concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal (H03L7/10 takes precedence; circuits for comparing the phase or frequency of two mutually-independent oscillations H03D13/00) · CPC title

• H04L27/2053

  using more than one carrier, e.g. carriers with different phases · CPC title