Reduced memory iterative baseband processing

Patent metadata

Field	Value
Publication number	US-9425922-B2
Application number	US-201414461030-A
Country	US
Kind code	B2
Filing date	Aug 15, 2014
Priority date	Aug 15, 2014
Publication date	Aug 23, 2016
Grant date	Aug 23, 2016

Abstract

A receiver, including: a posteriori probability demodulator configured to receive an input digital signal and output demodulated data; a deinterleaver configured to deinterleave the demodulated data; a forward error correction (FEC) decoder configured to error correct the demodulated data; a FEC encoder configured to encode the error corrected demodulated data; an interleaver configured to interleave the FEC encoded data and output the interleaved FEC encoded data to the posteriori probability demodulator; and a symbol compressor/decompressor configured to compress symbol data from the a posteriori demodulator and store the compressed data in a symbol memory and configured to decompress compressed symbol data stored in the symbol memory.

First claim

What is claimed is:

1. A receiver, comprising:
an a posteriori probability demodulator configured to receive an input digital signal and output demodulated data;
a deinterleaver configured to deinterleave the demodulated data;
a forward error correction (FEC) decoder configured to error correct the demodulated data;
a FEC encoder configured to encode the error corrected demodulated data;
an interleaver configured to interleave the FEC encoded data and output the interleaved FEC encoded data to the a posteriori probability demodulator; and
a symbol compressor/decompressor configured to compress symbol data from the a posteriori demodulator and store the compressed data in a symbol memory and configured to decompress compressed symbol data stored in the symbol memory, wherein in a second demodulation iteration, the symbol data, which is the decompressed compressed symbol data, is less precise than the symbol data in a first demodulation iteration.

2. The system of claim 1 , wherein compressing the symbol data includes quantizing the symbol data.

3. The system of claim 1 , wherein compressing the symbol data includes using one of lossy compression, lossless compression, and lossless and lossy compression.

4. The system of claim 1 , further comprising a log likelihood ratio (LLR) compressor/decompressor configured to compress LLR data from the interleaver and store the compressed LLR data in an interleave memory and configured to decompress compressed LLR data stored in the interleave memory.

5. The system of claim 4 , wherein compressing the LLR data includes quantizing the LLR data.

6. The system of claim 4 , wherein compressing the symbol data includes using one of lossy compression, lossless compression, and lossless and lossy compression.

7. A receiver, comprising:
an a posteriori probability demodulator configured to receive an input digital signal and output demodulated data;
a deinterleaver configured to deinterleave the demodulated data;
a soft input soft output (SISO) decoder configured to decode the demodulated data;
an interleaver configured to interleave the demodulated data and output the interleaved demodulated data to the a posteriori probability demodulator; and
a symbol compressor/decompressor configured to compress symbol data from the a posteriori demodulator and store the compressed data in a symbol memory and configured to decompress compressed symbol data stored in the symbol memory, wherein in a second demodulation iteration, the symbol data, which is the decompressed compressed symbol data, is less precise than the symbol data in a first demodulation iteration.

8. The system of claim 7 , wherein compressing the symbol data includes quantizing the symbol data.

9. The system of claim 7 , wherein compressing the symbol data includes using one of lossy compression, lossless compression, and lossless and lossy compression.

10. The system of claim 7 , further comprising a log likelihood ratio (LLR) compressor/decompressor configured to compress LLR data from the interleaver and store the compressed LLR data in an interleave memory and configured to decompress compressed LLR data stored in the interleave memory.

11. The system of claim 10 , wherein compressing the LLR data includes quantizing the LLR data.

12. The system of claim 10 , wherein compressing the symbol data includes using one of lossy compression, lossless compression, and lossless and lossy compression.

13. A non-transitory machine-readable storage medium encoded with instructions for execution by a processor in a receiver, comprising:
instructions for an a posteriori probability demodulating an input digital signal and outputting demodulated data;
instructions for deinterleaving the demodulated data;
instructions for a forward error correction (FEC) decoding the demodulated data;
instructions for FEC encoding the error corrected demodulated data;
instructions for interleaving the FEC encoded data;
instructions for compressing symbol data from the demodulated data and storing the compressed data in a symbol memory; and
instructions for decompressing compressed symbol data stored in the symbol memory, wherein in a second demodulation iteration, the symbol data, which is the decompressed compressed symbol data, is less precise than the symbol data in a first demodulation iteration.

14. The non-transitory machine-readable storage medium of claim 13 , wherein compressing the symbol data includes quantizing the symbol data.

15. The non-transitory machine-readable storage medium of claim 13 , further comprising:
instructions for compressing interleaved data and storing the compressed interleaved data in an interleave memory; and
instructions for decompressing compressed interleaved data stored in the interleave memory.

16. The non-transitory machine-readable storage medium of claim 15 , wherein compressing the interleaved data includes quantizing the interleaved data.

17. A non-transitory machine-readable storage medium encoded with instructions for execution by a processor in a receiver, comprising:
instructions for an a posteriori probability demodulating an input digital signal and outputting demodulated data;
instructions for deinterleaving the demodulated data;
instructions for soft input soft output (SISO) decoding the demodulated data;
instructions for interleaving the SISO decoded data;
instructions for compressing symbol data from the demodulated data and storing the compressed data in a symbol memory; and
instructions for decompressing compressed symbol data stored in the symbol memory,
wherein in a second demodulation iteration, the symbol data, which is the decompressed compressed symbol data, is less precise than the symbol data in a first demodulation iteration.

18. The non-transitory machine-readable storage medium of claim 17 , wherein compressing the symbol data includes quantizing the symbol data.

19. The non-transitory machine-readable storage medium of claim 17 , further comprising:
instructions for compressing interleaved data and storing the compressed interleaved data in an interleave memory; and
instructions for decompressing compressed interleaved data stored in the interleave memory.

20. The non-transitory machine-readable storage medium of claim 19 , wherein compressing the interleaved data includes quantizing the interleaved data.

Assignees

• Nxp Bv

Inventors

• Engin Nur

Classifications

• H03M13/6325

  Error control coding in combination with demodulation · CPC title

• H03M7/00

  Conversion of a code where information is represented by a given sequence or number of digits to a code where the same {, similar or subset of} information is represented by a different sequence or number of digits · CPC title

• H04L1/0054 Primary

  Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms · CPC title

• H03M13/3776

  using a re-encoding step during the decoding process · CPC title

• H03M13/6588

  Compression or short representation of variables · CPC title