Methods and apparatus for configuring and reconfiguring a partial reconfiguration region

Patent metadata

Field	Value
Publication number	US-9425802-B1
Application number	US-201514723876-A
Country	US
Kind code	B1
Filing date	May 28, 2015
Priority date	May 28, 2015
Publication date	Aug 23, 2016
Grant date	Aug 23, 2016

Abstract

An integrated circuit for configuring and reconfiguring a configuration shift register (CSR) partial reconfiguration region is disclosed. The integrated circuit includes a CSR chain that is partitioned into a group of CSR partial reconfiguration regions. A multiplexer circuit is added to the end of each PR region to allow the PR region to be bypassed or connected to the next PR region. Each PR region is connected to a PR circuit that facilitates the CSR configuration of the respective PR region. The PR circuit includes region enable circuitry and region control circuitry. Region enable circuitry enables the configuration of the CSR PR region. Region control circuitry generates local reconfiguration control signals to control the configuration operation of the enabled CSR PR region.

First claim

What is claimed is:

1. An integrated circuit comprising:
a plurality of configuration shift registers (CSRs), wherein each CSR in the plurality of CSRs is formed from a plurality of serially-coupled configuration registers, wherein the plurality of CSRs are partitioned into a predetermined number of CSR partial reconfiguration regions, and wherein each CSR partial reconfiguration region is coupled to a partial reconfiguration (PR) circuit that includes:
region enable circuitry that receives PR circuit enable data and that selectively enables reconfiguration of the CSR partial reconfiguration region based on the PR circuit enable data; and
region control circuitry that receives global configuration control signals and generates local reconfiguration control signals based on the PR circuit enable data when the reconfiguration of the CSR partial reconfiguration region is enabled by the region enable circuitry.

2. The integrated circuit defined in claim 1 , wherein the local reconfiguration control signals are used to selectively enable CSR data to be written into a selected one of the CSR partial reconfiguration regions when the reconfiguration of the selected CSR partial reconfiguration region is enabled.

3. The integrated circuit defined in claim 1 , wherein the region enable circuitry determines whether a region enable signal is asserted to the region enable circuitry, and wherein the region enable signal indicates whether the CSR partial reconfiguration region is in an active state.

4. The integrated circuit defined in claim 3 , wherein the region enable circuitry produces a region enable circuitry output when the region enable signal is asserted.

5. The integrated circuit defined in claim 1 , wherein the region enable circuitry further comprises:
an enable register circuit that receives configuration data of the PR circuit; and
a shadow enable register circuit that sequentially receives reference data from the enable register circuit and produces a region enable circuitry output, wherein the region enable circuitry output corresponds to the state of the CSR partial reconfiguration region.

6. The integrated circuit defined in claim 5 , wherein the CSR partial reconfiguration region receives an input-output (IO) signal and transmits a shifted IO signal, the integrated circuit further comprising:
a multiplexer circuit that receives the IO signal and the shifted IO signal, wherein the multiplexer circuit is controlled by the region enable circuitry to output a selected one of the IO signal and the shifted IO signal in response to identifying the state of the CSR partial reconfiguration region.

7. The integrated circuit defined in claim 6 , wherein the region enable circuitry produces a region enable circuitry output when the region enable signal is deasserted.

8. The integrated circuit defined in claim 7 wherein the region enable circuitry sends the region enable circuitry output to the multiplexer circuit to select the IO signal as an output signal.

9. A method of configuring an integrated circuit comprising:
with a configuration shift register (CSR) partial reconfiguration region, receiving an input-output (IO) signal;
with a partial reconfiguration (PR) circuit coupled to the CSR partial reconfiguration region, receiving configuration data and determining a state of the CSR partial reconfiguration region based on the received configuration data; and
with the PR circuit, selectively enabling the CSR partial reconfiguration region in response to determining the state of the CSR partial reconfiguration region, wherein the PR circuit includes region enable circuitry and region control circuitry.

10. The method defined in claim 9 , further comprising:
with the PR circuit, selectively enabling a signal shifting function that uses the IO signal in response to determining the state of the CSR partial reconfiguration region.

11. The method defined in claim 9 , wherein determining the state of the CSR partial reconfiguration region comprises determining whether a configuration data portion of the partial reconfiguration CSR is present in the configuration data.

12. The method defined in claim 11 , the method further comprising:
with the region enable circuitry, generating a region enable circuitry output in response to determining that the configuration data portion of the CSR partial reconfiguration region is present in the configuration data.

13. The method defined in claim 12 , further comprising:
with a multiplexer circuit, receiving the IO signal and a shifted IO signal.

14. The method defined in claim 13 , wherein the region enable circuitry sends the region enable circuitry output to the multiplexer circuit to couple an output signal to either the IO signal or the shifted IO signal.

15. The method defined in claim 14 , further comprising:
with an additional CSR partial reconfiguration region coupled to another PR circuit, receiving the output signal from the multiplexer circuit of the partial reconfiguration CSR.

16. A method of reconfiguring a configuration shift register (CSR) partial reconfiguration region on an integrated circuit, comprising:
with a partial reconfiguration (PR) circuit coupled to the CSR partial reconfiguration region, receiving input configuration data;
with the PR circuit, determining whether the CSR partial reconfiguration region is enabled by determining whether a configuration data portion of the CSR partial reconfiguration region is present in the input configuration data; and
with region enable circuitry in the PR circuit, generating a region enable circuitry output in response to detecting that the configuration data portion of the CSR partial reconfiguration region is present in the input configuration data.

17. The method defined in claim 16 , further comprising:
with region control circuitry coupled to the region enable circuitry, receiving global configuration control signals and producing local reconfiguration control signals based on the region enable circuitry output.

18. The method defined in claim 17 , further comprising:
with the CSR partial reconfiguration region,
receiving an input-output (IO) signal and outputting a shifted IO signal based on the local reconfiguration control signals.

19. The method defined in claim 18 , further comprising:
with a multiplexer circuit, receiving the IO signal and the shifted IO signal; and
with the multiplexer circuit, selecting an output signal from the IO signal and the shifted IO signal based on the region enable circuitry output.

Assignees

• Altera Corp

Inventors

• Xiao Ping

Classifications

• H03K19/1776

  for memories · CPC title

• H03K19/17744

  for input/output signals · CPC title

• H03K19/0008

  Arrangements for reducing power consumption · CPC title

• H03K19/17728

  Reconfigurable logic blocks, e.g. lookup tables · CPC title

• G06F30/34 Primary

  for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD] · CPC title