Amplifier circuit, bi-stage amplifier circuit, multi-stage amplifier circuit, RF-amplifier circuit, receiver section, RF-transceiver, and integrated circuit

Patent metadata

Field	Value
Publication number	US-9425748-B2
Application number	US-201414556617-A
Country	US
Kind code	B2
Filing date	Dec 1, 2014
Priority date	May 20, 2014
Publication date	Aug 23, 2016
Grant date	Aug 23, 2016

Abstract

The present invention relates to an amplifier circuit, comprising: first to fourth semiconductor amplifiers for controlling first to fourth currents between supply and output terminals, a first input terminal connected to provide a first input signal to a first control terminal of the first semiconductor amplifier and to a fourth control terminal of the fourth semiconductor amplifier, and a second input terminal connected to provide a second input signal to a second control terminal of the second semiconductor amplifier and to a third control terminal of the third semiconductor amplifier.
The present invention also relates to a bi-stage amplifier circuit, and to a multi-stage amplifier circuit comprising a cascade of a number of amplifier circuits complying to the present invention, the multi-stage amplifier circuit having a gain control logic prepared to control a gain of at least one of the amplifier circuits.

First claim

The invention claimed is:

1. An amplifier circuit, comprising:
a first transistor that controls a first current between a first supply terminal and a first output terminal;
a second transistor coupled to the first output terminal that controls a second current between the first output terminal and a second supply terminal;
a third transistor that controls a third current between the first supply terminal and a second output terminal;
a fourth transistor coupled to the second output terminal that controls a fourth current between the second output terminal and the second supply terminal;
a first input terminal connected to a first control terminal of the first transistor and coupled to a fourth control terminal of the fourth transistor with a first switch; and
a second input terminal connected to a second control terminal of the second transistor and coupled to a third control terminal of the third transistor with a second switch,
wherein a first input signal is received at the first input terminal and a second input signal is received at the second input terminal, the first input signal different from the second input signal such that a differential between the first input signal and the second input signal is received at the amplifier circuit, and wherein operation of the first or second switch controls a gain of the amplifier circuit.

2. The amplifier circuit according to claim 1 , wherein each of the control terminals is connected to a bias circuit, for adjusting bias currents of each of the transistors.

3. The amplifier circuit according to claim 2 , wherein each of the bias circuits comprises a resistor for connecting the related control terminal to a bias voltage supply.

4. The amplifier circuit according to claim 2 , wherein at least two of the bias circuits have a common bias voltage supply.

5. The amplifier circuit according to claim 1 , comprising a common tail element circuit connected to the first or to the second supply terminal for enforcing an anti-synchronous amplifier operation of a second branch of the amplifier circuit in relation to an amplifier operation of a first branch of the amplifier circuit, the first branch comprising the first and second transistors, the second branch comprising the third and fourth transistors.

6. The amplifier circuit according to claim 5 , wherein the common tail element circuit comprises at least one of a current-source and a resistor connected in series between the second supply terminal and a ground.

7. The amplifier circuit according to claim 1 , comprising a first direct current (DC) insulation between the first input terminal and the first control terminal.

8. The amplifier circuit according to claim 1 , comprising a second direct current (DC) insulation between the second input terminal and the second control terminal.

9. The amplifier circuit according to claim 1 , comprising a third direct current (DC) insulation between the second input terminal and the third control terminal.

10. The amplifier circuit according to claim 1 , comprising a fourth direct current (DC) insulation between the first input terminal and the fourth control terminal.

11. The amplifier circuit according to claim 1 , comprising a first order high-pass filter, the filter comprising at least one resistor and at least one capacitor.

12. A multi-stage amplifier circuit, comprising a cascade of a number of amplifier circuits according to claim 1 , the multi-stage amplifier circuit having a gain control logic circuit connected to control a gain of at least one of the amplifier circuits.

13. A receiver section, comprising at least one of the amplifier circuits according to claim 12 .

14. A radio frequency (RF) transceiver, comprising the receiver section according to claim 13 , and a transmitter section.

15. A method of operating an amplifier circuit, the method comprising:
applying a first input signal to a first input terminal, the first input terminal connected to a first control terminal of a first transistor and coupled to a fourth control terminal of a fourth transistor with a first switch, wherein the first transistor controls a first current between a first supply terminal and a first output terminal;
applying a second input signal to a second input terminal, the second input terminal connected to a second control terminal of a second transistor and coupled to a third control terminal of a third transistor with a second switch, wherein the second transistor is coupled to the first output terminal and controls a second current between the first output terminal and a second supply terminal, the third transistor controls a third current between the first supply terminal and a second output terminal, and the fourth transistor is coupled to the second output terminal and controls a fourth current between the second output terminal and the second supply terminal; and
operating the first and second switches to control a gain of the amplifier circuit, wherein the first and second input terminals are distinct, and the first and second input signals are different such that a differential is applied to the first and second input terminals.

Assignees

• Pavao-Moreira Cristian
• Goumballa Birama
• Freescale Semiconductor Inc

Inventors

• Pavao-Moreira Cristian
• Goumballa Birama

Classifications

• H03F2203/45694

  the LC comprising more than one shunting resistor · CPC title

• H03F2200/555

  A voltage generating circuit being realised for biasing different circuit elements · CPC title

• H03F3/26

  Push-pull amplifiers; Phase-splitters therefor (duplicated single-ended push-pull arrangements or phase-splitters therefor H03F3/30) · CPC title

• H03F3/191

  Tuned amplifiers (H03F3/193, H03F3/195 take precedence) · CPC title

• H03F1/0261 Primary

  with control of the polarisation voltage or current, e.g. gliding Class A · CPC title