Silicon carbide semiconductor device and method for manufacturing same

Patent metadata

Field	Value
Publication number	US-9425263-B2
Application number	US-201514803868-A
Country	US
Kind code	B2
Filing date	Jul 20, 2015
Priority date	Aug 7, 2012
Publication date	Aug 23, 2016
Grant date	Aug 23, 2016

Abstract

A method for manufacturing a silicon carbide semiconductor device includes the following steps. A silicon carbide substrate is prepared. A first heating step of heating the silicon carbide substrate in an atmosphere of oxygen is performed. A second heating step of heating the silicon carbide substrate to a temperature of 1300° C. or more and 1500° C. or less in an atmosphere of gas containing nitrogen atoms or phosphorus atoms is performed after the first heating step. A third heating step of heating the silicon carbide substrate in an atmosphere of a first inert gas is performed after the second heating step. Thus, the silicon carbide semiconductor device in which threshold voltage variation is small, and a method for manufacturing the same can be provided.

First claim

What is claimed is:

1. A silicon carbide semiconductor device comprising:
a silicon carbide substrate;
an oxide film arranged in contact with said silicon carbide substrate;
a gate electrode arranged in contact with said oxide film such that said gate oxide film is interposed between said gate electrode and said silicon carbide substrate; and
a first electrode and a second electrode arranged in contact with said silicon carbide substrate,
said first electrode and said second electrode being configured such that a current flowing between said first electrode and said second electrode can be controlled by a gate voltage applied to said gate electrode,
the difference between a first threshold voltage of said silicon carbide semiconductor device that is measured for the first time and a second threshold voltage of said silicon carbide semiconductor device that is measured after stress has been applied to said silicon carbide semiconductor device continuously for 1000 hours is within ±0.2 V,
the application of said stress being applying said gate voltage of 45 kHz varying from −5 V to +15 V to said gate electrode, with the voltage of said first electrode being 0 V and the voltage of said second electrode being 0 V.

2. The silicon carbide semiconductor device according to claim 1 , wherein
the difference between said first threshold voltage and a third threshold voltage that is measured after a lapse of any period of time of up to 1000 hours after the start of the application of said stress to said silicon carbide semiconductor device is within ±0.2 V.

3. The silicon carbide semiconductor device according to claim 1 , wherein
said stress is applied at a temperature of 150° C.

4. The silicon carbide semiconductor device according to claim 1 , wherein
the difference between said first threshold voltage and said second threshold voltage is within ±0.2 V when said stress is applied either at room temperature or at a temperature of 150° C.

Assignees

• Sumitomo Electric Industries

Inventors

• Hiyoshi Toru
• Uchida Kosuke
• Masuda Takeyoshi

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10D64/01366

  the semiconductor being silicon carbide · CPC title

• H10D12/032

  of vertical IGBTs · CPC title

• H10D62/8325 Primary

  Silicon carbide · CPC title

• H10D30/0291

  of vertical DMOS [VDMOS] FETs · CPC title