Semiconductor structure and method for making same

Patent metadata

Field	Value
Publication number	US-9425146-B2
Application number	US-89186510-A
Country	US
Kind code	B2
Filing date	Sep 28, 2010
Priority date	Sep 28, 2010
Publication date	Aug 23, 2016
Grant date	Aug 23, 2016

Abstract

One or more embodiments relate to a method for making a semiconductor structure, comprising: providing a workpiece; forming a barrier layer over the workpiece; forming a separation layer over the barrier layer; forming a conductive layer over the separation layer; and wet etching the conductive layer.

First claim

What is claimed is:

1. A method for making a semiconductor structure, comprising:
forming a barrier layer over a workpiece, said barrier layer comprising the chemical element W (tungsten);
forming a separation layer over and in direct contact with said barrier layer, said separation layer essentially lacking the chemical element W (tungsten), said separation layer comprising at least one material from the group consisting of titanium metal, titanium alloy, titanium nitride, tantalum metal, tantalum alloy, or tantalum nitride;
forming a conductive layer over and in direct contact with said separation layer, said conductive layer comprising the chemical element Cu (copper), wherein the conductive layer comprises more than 50% atomic percentage of copper; and
wet etching said conductive layer selectively and stopping on the separation layer, wherein the wet etching is performed using an etchant that is chosen to be selective between the conductive layer and the separation layer, the etchant including phosphoric acid, acetic acid and nitric acid; and
patterning the separation layer after wet etching the conductive layer.

2. The method of claim 1 , wherein said barrier layer comprises titanium-tungsten alloy.

3. The method of claim 1 , wherein, before wet etching said conductive layer, forming a mask over said conductive layer.

4. The method of claim 1 , wherein the chemical element Cu (copper) is in the form of at least one of copper metal or copper alloy.

5. The method of claim 1 , wherein the conductive layer comprises copper metal.

6. The method of claim 1 , wherein said separation layer comprises at least one of titanium metal, titanium alloy, tantalum metal or tantalum alloy.

7. The method of claim 1 , wherein said separation layer comprises at least one of titanium metal or titanium alloy.

8. The method of claim 1 , wherein said etchant includes 49% phosphoric acid, 35% acetic acid and 1.5% nitric acid.

9. A method for making a semiconductor structure, the method comprising:
providing a semiconductor substrate, a top surface of the substrate comprising an inter-level dielectric layer;
forming a barrier layer over and in direct contact with the inter-level dielectric layer, the barrier layer comprising the chemical element W (tungsten);
forming a separation layer over and in direct contact with the barrier layer, the separation layer essentially lacking the chemical element W (tungsten);
forming a conductive layer over and in direct contact with the separation layer the conductive layer comprising the chemical element Cu (copper), wherein the conductive layer comprises more than 50% atomic percentage of copper;
forming a mask layer over the conductive layer;
patterning the mask layer; and
forming a plurality of metallization lines that are spaced apart electrically isolated from each other by:
using a first etching process that uses a first etchant, wet etching the conductive layer selectively and stopping on the separation layer,
using a second etching process that uses a second etchant different from the first etchant, patterning the separation layer selectively with respect to the etched conductive layer, wherein the metallization lines include a first electrical signal line for directing electrical signals in a horizontal direction relative to the top surface of the substrate and a second electrical signal line for directing electrical signals in the horizontal direction.

10. The method of claim 9 , further comprising forming a second plurality of metallization lines over the plurality of metallization lines.

11. The method of claim 9 , wherein forming the conductive layer comprises forming a conductive layer having a thickness between 500 and 1500 nm.

12. The method of claim 9 , wherein the separation layer comprises at least one material selected from the group consisting of titanium metal, titanium alloy, titanium nitride, tantalum metal, tantalum alloy, and tantalum nitride.

13. The method of claim 12 , wherein the separation layer comprises at least one material selected from the group consisting of titanium metal, titanium alloy, tantalum metal or tantalum alloy.

14. The method of claim 9 , wherein the barrier layer comprises titanium-tungsten alloy.

15. The method of claim 9 , wherein the separation layer comprises at least one of titanium metal or titanium alloy.

16. The method of claim 9 , wherein the first etchant includes phosphoric acid.

17. The method of claim 16 , wherein the first etchant includes phosphoric acid, acetic acid and nitric acid.

18. The method of claim 17 , wherein the first etchant comprises about 49% phosphoric acid, 35% acetic acid and 1.5% nitric acid.

19. The method of claim 17 , wherein the second etchant comprises hydrogen fluoride.

20. A method for making a semiconductor structure, the method comprising:
providing a semiconductor substrate, a top surface of the substrate comprising an inter-level dielectric layer;
forming a barrier layer having a thickness between 5 nm and 300 nm over and in direct contact with the inter-level dielectric layer, the barrier layer comprising the chemical element W (tungsten);
forming a separation layer having a thickness between 10 nm and 500 nm over and in direct contact with the barrier layer, the separation layer essentially lacking the chemical element W (tungsten);
forming a conductive layer having a thickness between 500 nm and 1500 nm over and in direct contact with the separation layer the conductive layer comprising the chemical element Cu (copper), wherein the conductive layer comprises more than 50% atomic percentage of copper;
forming a mask layer over the conductive layer;
patterning the mask layer;
forming a plurality of metallization lines that are spaced apart electrically isolated from each other by
using a first etching process that uses a first etchant comprising phosphoric acid, acetic acid, and nitric acid, wet etching the conductive layer selectively and stopping on the separation layer,
using a second etching process that uses a second etchant comprising hydrofluoric acid, patterning the separation layer selectively with respect to the etched conductive layer, the metallization lines including a first electrical signal line for directing electrical signals in a horizontal direction relative to the top surface of the substrate and a second electrical signal line for directing electrical signals in the horizontal direction; and

forming a second plurality of metallization lines overlying the plurality of metallization lines.

Assignees

• Fischer Thomas
• Foerster Juergen
• Robl Werner
• Stueckjuergen Andreas
• Infineon Technologies Ag

Inventors

• Fischer Thomas
• Foerster Juergen
• Robl Werner
• Stueckjuergen Andreas

Classifications

• H10W72/953

  not comprising solid metals or solid metalloids, e.g. polymers, ceramics or liquids · CPC title

• H10W72/952

  comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title

• H10W72/923

  Bond pads having multiple stacked layers · CPC title

• H10W72/01951

  Changing the shapes of bond pads · CPC title

• H10W72/01953

  by etching · CPC title