Providing multiple virtual device controllers by redirecting an interrupt from a physical device controller

Patent metadata

Field	Value
Publication number	US-9424211-B2
Application number	US-34797008-A
Country	US
Kind code	B2
Filing date	Dec 31, 2008
Priority date	Dec 31, 2008
Publication date	Aug 23, 2016
Grant date	Aug 23, 2016

Abstract

Embodiments of apparatuses, methods, and systems for providing multiple virtual device controllers by redirecting an interrupt from a physical device controller are disclosed. In one embodiment, an apparatus includes a processor, a physical device controller, and virtualization logic. The virtualization logic is to receive a first interrupt from the physical device controller, and in response, send a second interrupt to the processor from one of a plurality of virtual device controllers.

First claim

What is claimed is:

1. An apparatus comprising:
a physical device controller;
a processor to execute a plurality of virtual machines, each virtual machine having a virtual device controller associated with the physical device controller, and a virtual machine monitor;
a local interrupt controller;
a system memory;
programmable configuration storage in which to store a plurality of entries, including a first entry including a physical address value, a physical data value, a virtual address value, and a virtual data value, the physical address value associated with the local interrupt controller according to the virtual machine monitor's view of the system memory, the physical data value corresponding to a first address of an interrupt handler according to the virtual machine monitor's view of the system memory, the virtual address value associated with the local interrupt controller according to one of the plurality of virtual machines' view of the system memory, and the virtual data value corresponding to a second address of the interrupt handler according to the one of the plurality of virtual machines' view of the system memory, wherein additional entries include the first physical address value and the first physical data value to associate additional virtual machine's virtual device controllers with the physical device controller;
virtualization circuitry to trap a first interrupt message without the virtual machine monitor intercepting the first interrupt message, the first interrupt message having the physical address value in an address field of the first interrupt message and the physical data value in a data field of the first interrupt message, from the physical device controller to the processor, and in response, send a second interrupt message, including the virtual address value in an address field of the second interrupt message and the virtual data value in a data field of the second interrupt message, to the processor from one of a plurality of virtual device controllers associated with the physical device controller, the second interrupt message corresponding to but separate from the first interrupt message.

2. The apparatus of claim 1 , wherein the programmable configuration storage is to be programmed to maintain status of which of the plurality of virtual machines the first interrupt message is to be redirected.

3. The apparatus of claim 1 , wherein the virtualization circuitry is to send the second interrupt message to the processor only after control of the processor has been transferred to the virtual machine.

4. A method comprising:
executing, by a processor, a plurality of virtual machines and a virtual machine monitor;
trapping, by virtualization circuitry without interception by the virtual machine monitor, a first interrupt message from a physical device controller to the processor, the first interrupt message having a physical address value in an address field of the first interrupt message and a physical data value in a data field of the first interrupt message, the physical address value associated with a local interrupt controller according to the virtual machine monitor's view of a system memory, the physical data value corresponding to a first address of an interrupt handler according to a virtual machine monitor's view of a system memory;
sending, by the virtualization circuitry in response to trapping the first interrupt message, a second interrupt message to the processor from one of a plurality of virtual device controllers associated with the physical device controller, the second interrupt including a virtual address value in an address field of the second interrupt message and a virtual data value in a data field of the second interrupt message, the virtual address value associated with local interrupt controller according to one of the plurality of virtual machines' view of the system memory, the virtual data value corresponding to a second address of the interrupt handler according to one of the plurality of virtual machines' view of the system memory, the virtual address value and virtual data value from an entry in a programmable configuration storage, the entry including the physical address value and the physical data value to associate the physical device controller with a virtual device controller for the virtual machine, the programmable configuration storage having additional entries including the physical address value and the physical data value to associate the physical device controller with additional virtual device controllers for additional virtual machines.

5. The method of claim 4 , further comprising programming the programmable configuration storage to maintain status of which of the plurality of virtual machines the first interrupt message is to be redirected.

6. The method of claim 4 , wherein sending the second interrupt message to the processor is performed only after control of the processor has been transferred to the virtual machine.

Assignees

• Bogin Zohar
• Kareenahaili Suryaprasad
• Nalawadi Rajeev K
• Tabet Michael
• Abramson Darren
• Intel Corp

Inventors

• Bogin Zohar
• Kareenahaili Suryaprasad
• Nalawadi Rajeev K
• Tabet Michael
• Abramson Darren

Classifications

• G06F9/4812

  by interrupt, e.g. masked · CPC title

• G06F13/24 Primary

  using interrupt (G06F13/32 takes precedence) · CPC title

• G06F9/45558

  Hypervisor-specific management and integration aspects · CPC title

• G06F9/45533 Primary

  Hypervisors; Virtual machine monitors · CPC title