Integrated CMOS and MEMS sensor fabrication method and structure

US9422156B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9422156-B2
Application numberUS-201514752718-A
CountryUS
Kind codeB2
Filing dateJun 26, 2015
Priority dateJul 7, 2014
Publication dateAug 23, 2016
Grant dateAug 23, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of providing a CMOS-MEMS structure is disclosed. The method comprises patterning a first top metal on a MEMS actuator substrate and a second top metal on a CMOS substrate. Each of the MEMS actuator substrate and the CMOS substrate include an oxide layer thereon. The method includes etching each of the oxide layers on the MEMS actuator substrate and the base substrate, utilizing a first bonding step to bond the first patterned top metal of the MEMS actuator substrate to the second patterned top metal of the base substrate. Finally the method includes etching an actuator layer into the MEMS actuator substrate and utilizing a second bonding step to bond the MEMS actuator substrate to a MEMS handle substrate.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: patterning a first top metal layer on a microelectromechanical system (MEMS) actuator layer and a second top metal layer on a complementary metal-oxide semiconductor (CMOS) substrate to generate a patterned first top metal layer and a patterned second top metal layer, wherein the MEMS actuator layer and the CMOS substrate have respective oxide layers on the MEMS actuator layer and the CMOS substrate; etching respective portions of the respective oxide layers on the MEMS actuator layer and the CMOS substrate; bonding the patterned first top metal layer to the patterned second top metal layer; etching the MEMS actuator layer to cause release of a movable structure; and bonding the MEMS actuator layer to a MEMS handle substrate. 2. The method of claim 1 , wherein the etching the respective portions of the respective oxide layers comprises providing at least one standoff disposed between the CMOS substrate and the MEMS actuator layer, and wherein a first end of the standoff is disposed on the CMOS substrate and a second end of the standoff is disposed on the MEMS actuator layer. 3. The method of claim 2 , wherein the standoff comprises the patterned first top metal layer or the patterned second top metal layer. 4. The method of claim 1 , further comprising grinding the MEMS actuator layer to a defined thickness after the bonding the patterned first top metal layer to the patterned second top metal layer. 5. The method of claim 4 , wherein the defined thickness is between about 10 and about 100 microns. 6. The method of claim 1 , further comprising: providing a cavity in the MEMS handle layer; and oxidizing the MEMS handle layer prior to the bonding the MEMS actuator layer to a MEMS handle substrate. 7. The method of claim 1 , wherein the bonding the patterned first top metal layer to the patterned second top metal layer comprises a first low temperature bond and wherein the bonding the MEMS actuator layer to a MEMS handle substrate comprises a second low temperature bond. 8. The method of claim 7 , wherein the first low temperature bond comprises a compression bond and the second low temperature bond comprises a fusion bond. 9. The method of claim 1 , wherein a temperature of the bonding the patterned first top metal layer to the patterned second top metal layer and the bonding the MEMS actuator layer to a MEMS handle substrate is between about 150 and about 400 degrees Celsius. 10. The method of claim 1 , wherein the patterned first top metal layer and patterned second top metal layer comprise at least one of copper (Cu) or nickel (Ni). 11. The method of claim 1 , wherein patterning comprises damascene patterning. 12. The method of claim 1 , wherein the patterned first top metal layer and the patterned second top metal layer are utilized to electrically connect the MEMS actuator layer and the CMOS substrate. 13. The method of claim 1 , wherein the bonding the patterned first top metal layer to the patterned second top metal layer and the bonding the MEMS actuator layer to a MEMS handle substrate provide a hermetic seal for the device. 14. The method of claim 1 , wherein the standoff defines a gap between the movable structure and the CMOS substrate. 15. The method of claim 1 , further comprising: forming a bump stop based on another etching of the respective other portions of the respective oxide layers. 16. The method of claim 1 , further comprising: forming a contact layer on the patterned first top metal layer of the MEMS actuator layer. 17. The method of claim 1 , wherein the patterned first top metal layer and the patterned second top metal layer respectively comprises a first copper material and a second copper material. 18. The method of claim 1 , wherein the patterned first top metal layer and the patterned second top metal layer respectively comprises a first nickel material and a second material, and wherein the second material comprises at least one of copper or nickel. 19. The method of claim 15 , wherein the bump stop is electrically isolated from the patterned second top metal layer. 20. The method of claim 16 , wherein the contact layer is comprised of Titanium.

Assignees

Inventors

Classifications

  • Interconnects · CPC title

  • Interconnects · CPC title

  • Interconnects · CPC title

  • Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate · CPC title

  • B81B7/02Primary

    containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS] (B81B7/04 takes precedence) · CPC title

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What does patent US9422156B2 cover?
A method of providing a CMOS-MEMS structure is disclosed. The method comprises patterning a first top metal on a MEMS actuator substrate and a second top metal on a CMOS substrate. Each of the MEMS actuator substrate and the CMOS substrate include an oxide layer thereon. The method includes etching each of the oxide layers on the MEMS actuator substrate and the base substrate, utilizing a first…
Who is the assignee on this patent?
Invensense Inc
What technology area does this patent fall under?
Primary CPC classification B81B7/02. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Aug 23 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).