RF system-in-package with quasi-coaxial coplanar waveguide transition

US9419341B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9419341-B2
Application numberUS-201414217682-A
CountryUS
Kind codeB2
Filing dateMar 18, 2014
Priority dateMar 18, 2014
Publication dateAug 16, 2016
Grant dateAug 16, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An IC package includes an IC die disposed at a first surface of a substrate, which includes a signal via extending between first and second metal layers. The first metal layer is proximate to the first surface and includes a first coplanar waveguide. The first coplanar waveguide has a first signal line coupling a die bump to the signal via and has a first ground plane co-planar with the first signal line. The second metal layer is proximate to a second surface and includes a second coplanar waveguide that has a second signal line coupling the signal via to a launcher element and has a second ground plane co-planar with the second signal line. The IC package further includes a waveguide channel aperture comprising a region surrounding the launcher element and which is substantially devoid of conductive material and a via fence disposed at a perimeter of the first region.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: an integrated circuit (IC) package comprising: an IC die disposed at a first surface of a substrate, the IC die comprising radio frequency (RF) circuitry; and the substrate, wherein the substrate comprises: a signal via extending between first and second metal layers of the substrate; the first metal layer proximate to the first surface and comprising a first coplanar waveguide, the first coplanar waveguide having a first signal line coupling a bump of the IC die to the signal via and having a first ground plane co-planar with the first signal line; the second metal layer proximate to a second surface of the substrate and comprising a second coplanar waveguide, the second coplanar waveguide having a second signal line coupling the signal via to a launcher element and having a second ground plane co-planar with the second signal line; a waveguide channel aperture comprising a first region surrounding the launcher element, the first region substantially devoid of conductive material; a via fence comprising metal vias disposed at a perimeter of the first region and extending between the first ground plane and the second ground plane; a third metal layer disposed between the first metal layer and the second metal layer, the third metal layer comprising a second waveguide channel aperture comprising a second region aligned with the first region, the second region being substantially devoid of conductive material; and wherein the third metal layer implements signal line routing for circuit components of the IC package. 2. The apparatus of claim 1 , wherein: the substrate further comprises a second region surrounding the signal via, the second region being substantially devoid of conductive material; and the via fence further comprises metal vias disposed at a perimeter of the second region and extending from the first ground plane to the second ground plane. 3. The apparatus of claim 2 , wherein the via fence further comprises: metal vias disposed at a perimeter of the first ground plane that is adjacent to the first signal line and extending from the first ground plane to the second ground plane. 4. The apparatus of claim 3 , wherein the via fence further comprises: metal vias disposed at a perimeter of the second ground plane that is adjacent to the second signal line and extending from the first ground plane to the second ground plane. 5. The apparatus of claim 1 , wherein: the RF circuitry is configured to communicate RF signaling; and the metal vias of the via fence are spaced from each other at a distance not greater than 10% of a wavelength of a center frequency of a bandwidth of the RF signaling. 6. The apparatus of claim 1 , wherein the first signal line is oriented 180 degrees relative to the second signal line. 7. The apparatus of claim 1 , further comprising: a waveguide adapter plate attached to the IC package, the waveguide adapter plate comprising: a third surface and an opposing fourth surface, the third surface facing the second surface of the substrate; and a waveguide channel section extending from third surface to the fourth surface, the waveguide channel section having a waveguide channel aperture at the third surface that is aligned with the waveguide channel aperture of the substrate. 8. The apparatus of claim 7 , further comprising: an antenna comprising an antenna flange attached at the fourth surface of the waveguide adapter plate, the antenna flange having a fifth surface facing the fourth surface and an opposing sixth surface, and further having a waveguide channel section aligned with the waveguide channel section of the waveguide adapter plate. 9. The apparatus of claim 8 , wherein the IC package, the waveguide adapter plate, and waveguide flange are attached via a set of bolts extending from the first surface of the IC package to the sixth surface of the waveguide flange via aligned bolt holes in each of the IC package, the waveguide adapter plate, and the waveguide flange. 10. A method of fabricating an antenna apparatus, the method comprising: fabricating an integrated circuit (IC) package, the IC package comprising: an IC die disposed at a first surface of a substrate, the IC die comprising radio frequency (RF) circuitry; and the substrate, wherein the substrate comprises: a signal via extending between first and second metal layers of the substrate; the first metal layer proximate to the first surface and comprising a first coplanar waveguide, the first coplanar waveguide having a first signal line coupling a bump of the IC die to the signal via and having a first ground plane co-planar with the first signal line; the second metal layer proximate to a second surface of the substrate and comprising a second coplanar waveguide, the second coplanar waveguide having a second signal line coupling the signal via to a launcher element and having a second ground plane co-planar with the second signal line; a waveguide channel aperture comprising a first region surrounding the launcher element, the first region being substantially devoid of conductive material; a via fence comprising metal vias disposed at a perimeter of the first region and extending from the first ground plane to the second ground plane; a third metal layer disposed between the first metal layer and the second metal layer, the third metal layer comprising a second waveguide channel aperture comprising a second region aligned with the first region, the second region being substantially devoid of conductive material, and wherein the third metal layer implements signal line routing for circuit components of the IC package. 11. The method of claim 10 , wherein fabricating the IC package further comprises: fabricating the substrate to include a second region surrounding the signal via, the second region being substantially devoid of conductive material; and fabricating the via fence to include metal vias disposed at a perimeter of the second region and extending from the first ground plane to the second ground plane. 12. The method of claim 11 , wherein fabricating the via fence further comprises fabricating the via fence to further include metal vias disposed at a perimeter of the first ground plane that is adjacent to the first signal line and extending from the first ground plane to the second ground plane. 13. The method of claim 10 , further comprising: fabricating a waveguide adapter plate attachable to the IC package, the waveguide adapter plate comprising: a third surface and an opposing fourth surface, the third surface to face the second surface of the substrate; and a waveguide channel section extending from third surface to the fourth surface, the waveguide channel section having a waveguide channel aperture at the third surface to align with the waveguide channel aperture of the substrate. 14. The method of claim 13 , further comprising: mounting an antenna flange to the waveguide adapter plate at the fourth surface, the antenna flange having a fifth surface to face the fourth surface and an opposing sixth surface, and further having a waveguide channel section to align with the waveguide channel section of the waveguide adapter plate. 15. The method of claim 14 , further comprising: attaching the IC package, the waveguide adapter plate, and waveguide flange via a set of bolts extending from the first surface of the IC package to the sixth surface of the waveguide flange via aligned holes in each of the IC package, the waveguide adapter plate, and the waveguide flange. 16. The method of claim

Assignees

Inventors

Classifications

  • Apparatus or processes specially provided for manufacturing horns · CPC title

  • H01Q13/02Primary

    Waveguide horns · CPC title

  • Hollow-waveguide/strip-line transitions · CPC title

  • by forming conductive walled aperture in base · CPC title

  • with other electrical component · CPC title

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What does patent US9419341B2 cover?
An IC package includes an IC die disposed at a first surface of a substrate, which includes a signal via extending between first and second metal layers. The first metal layer is proximate to the first surface and includes a first coplanar waveguide. The first coplanar waveguide has a first signal line coupling a die bump to the signal via and has a first ground plane co-planar with the first s…
Who is the assignee on this patent?
Peraso Tech Inc, Peraso Tech Inc
What technology area does this patent fall under?
Primary CPC classification H01Q13/02. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 16 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).