Thin film structures and devices with integrated light and heat blocking layers for laser patterning
US-2015364638-A1 · Dec 17, 2015 · US
US9419159B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9419159-B2 |
| Application number | US-201314073249-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 6, 2013 |
| Priority date | Feb 24, 2009 |
| Publication date | Aug 16, 2016 |
| Grant date | Aug 16, 2016 |
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Prepared is an n− type semiconductor substrate 1 having a first principal surface 1a and a second principal surface 1b opposed to each other, and having a p+ type semiconductor region 3 formed on the first principal surface 1a side. At least a region opposed to the p+ type semiconductor region 3 in the second principal surface 1b of the n− type semiconductor substrate 1 is irradiated with a pulsed laser beam to form an irregular asperity 10. After formation of the irregular asperity 10, an accumulation layer 11 with an impurity concentration higher than that of the n− type semiconductor substrate 1 is formed on the second principal surface 1b side of the n− type semiconductor substrate 1. After formation of the accumulation layer 11, the n− type semiconductor substrate 1 is subjected to a thermal treatment.
Opening claim text (preview).
The invention claimed is: 1. A back-illuminated type semiconductor light-detecting element comprising: a silicon substrate having a pn junction comprised of a semiconductor region of a first conductivity type and a semiconductor region of a second conductivity type, wherein on the silicon substrate, an accumulation layer of the first conductivity type is formed on a principal surface side of the silicon substrate and an irregular asperity is formed in at least a region opposed to the pn junction in the principal surface, wherein the region opposed to the pn junction in the principal surface of the silicon substrate is optically exposed, wherein the principal surface where the irregular asperity is formed constitutes a light incident surface, light incident from the principal surface travels in the silicon substrate, the irregular asperity is formed by applying a pulsed laser beam, and light traveling in the silicon substrate is scattered, diffused, or reflected by the irregular asperity, and wherein a thickness of the accumulation layer of the first conductivity type is larger than a height difference of the irregular asperity. 2. The back-illuminated type semiconductor light-detecting element according to claim 1 , wherein the light incident from the principal surface is scattered by the irregular asperity. 3. The back-illuminated type semiconductor light-detecting element according to claim 1 , wherein a region in which the irregular asperity is formed is contained in a surface of the accumulation layer.
Monocrystalline silicon PV cells · CPC title
of the substrates or of layers on substrates, e.g. textured ITO layer on a glass substrate · CPC title
having potential barriers · CPC title
the devices having potential barriers, e.g. phototransistors · CPC title
of the semiconductor bodies, e.g. textured active layers · CPC title
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