Integrated RF front end system

Patent metadata

Field	Value
Publication number	US-9419073-B2
Application number	US-201514703465-A
Country	US
Kind code	B2
Filing date	May 4, 2015
Priority date	Jun 28, 2012
Publication date	Aug 16, 2016
Grant date	Aug 16, 2016

Abstract

Systems and methods are disclosed for integrating functional components of front-end modules for wireless radios. Front-end modules disclosed may be dual-band front-end modules for use in 802.11ac-compliant devices. In certain embodiments, integration of front-end module components on a single die is achieved by implementing a high-resistivity layer or substrate directly underneath, adjacent to, and/or supporting SiGe BiCMOS technology elements.

First claim

What is claimed is:

1. A front-end module (FEM) comprising:
a silicon substrate including a high-resistivity portion;
a bipolar transistor disposed on the substrate above the high-resistivity portion; and
a low-resistivity well located between the bipolar transistor and a passive device, the low-resistivity well providing at least partial electrical isolation between the bipolar transistor and the passive device.

2. The FEM of claim 1 wherein the bipolar transistor includes a silicon base.

3. The FEM of claim 1 wherein the bipolar transistor includes a silicon-germanium alloy base.

4. The FEM of claim 1 wherein the passive device is disposed on the silicon substrate above the high-resistivity portion.

5. The FEM of claim 1 wherein the low-resistivity well surrounds the bipolar transistor.

6. The FEM of claim 1 wherein the silicon substrate further includes a low-resistivity portion.

7. The FEM of claim 6 wherein the low-resistivity portion includes the low-resistivity well.

8. The FEM of claim 1 further comprising a power amplifier, the power amplifier including the bipolar transistor.

9. The FEM of claim 1 wherein the high-resistivity portion has a resistivity of greater than or equal to 1 kOhm*cm.

10. A semiconductor die comprising:
a silicon substrate including a high-resistivity portion, the silicon substrate supporting a plurality of devices including a first device, the first device being a transistor;
front-end circuitry disposed on the silicon substrate, the front-end circuitry including the transistor, the transistor disposed above the high-resistivity portion; and
a low-resistivity well located between the transistor and a second device from the plurality of devices, the low-resistivity well providing at least partial electrical isolation between the transistor and the second device.

11. The semiconductor die of claim 10 wherein at least some of the plurality of devices are passive devices.

12. The semiconductor die of claim 10 wherein the transistor includes one of a silicon base or a silicon-germanium alloy base.

13. The semiconductor die of claim 10 wherein the low-resistivity well surrounds the transistor.

14. The semiconductor die of claim 10 wherein the silicon substrate further includes a low-resistivity portion, the low-resistivity portion including the low-resistivity well.

15. The semiconductor die of claim 10 wherein the high-resistivity portion has a resistivity of greater than or equal to 500 Ohm*cm.

16. A wireless device comprising:
a semiconductor die including a silicon substrate, front-end circuitry, and a low-resistivity well, the silicon substrate including a high-resistivity portion and supporting a plurality of devices including a transistor, the front-end circuitry disposed on the silicon substrate and including the transistor, the transistor disposed above the high-resistivity portion, and a low-resistivity well located between the transistor and an additional device from the plurality of devices, the low-resistivity well providing at least partial electrical isolation between the transistor and the additional device; and
an antenna in electrical communication with the semiconductor die for receiving and transmitting wireless signals.

17. The wireless device of claim 16 wherein at least some of the plurality of devices are passive devices.

18. The wireless device of claim 16 wherein the high-resistivity portion has a resistivity of at least 500 Ohm*cm.

19. The wireless device of claim 16 wherein the low-resistivity well at least partially surrounds the transistor.

20. The wireless device of claim 16 wherein the silicon substrate further includes a low-resistivity portion, the low-resistivity portion including the low-resistivity well.

Assignees

• Skyworks Solutions Inc

Inventors

• Mcpartlin Michael Joseph
• Doherty Mark M

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/753

  between laterally-adjacent chips · CPC title

• H10W74/10

  characterised by their shape or disposition · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/5475

  multiple bond wires connected to common bond pads at both ends of the wires · CPC title