Packaging through pre-formed metal pins

US9418953B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9418953-B2
Application numberUS-201414153691-A
CountryUS
Kind codeB2
Filing dateJan 13, 2014
Priority dateJan 13, 2014
Publication dateAug 16, 2016
Grant dateAug 16, 2016

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A package includes first package component and a second package component. The first package component includes a first electrical connector at a surface of the first package component, and a first solder region on a surface of the first electrical connector. The second package component includes a second electrical connector at a surface of the second package component, and a second solder region on a surface of the second electrical connector. A metal pin has a first end bonded to the first solder region, and a second end bonded to the second solder region.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: inserting a plurality of metal pins into a plurality of holes of a mold; disposing a dielectric film to allow the plurality of metal pins that is in the plurality of holes to penetrate through the dielectric film; heating one of a metal pin and a first solder region, wherein the first solder region is disposed at a surface of a first package component, wherein the metal pin is one of the plurality of metal pins that penetrates through the dielectric film; inserting a first end of the metal pin into a first molten portion of the first solder region; solidifying the first molten portion of the first solder region to bond the metal pin to the first solder region; heating one of the metal pin and a second solder region, wherein the second solder region is disposed at a surface of a second package component; inserting a second end of the metal pin into a second molten portion of the second solder region; and solidifying the second molten portion of the second solder region to bond the metal pin to the second solder region. 2. The method of claim 1 , wherein the heating one of the metal pin and the first solder region comprises heating the metal pin. 3. The method of claim 1 , wherein the inserting the first end of the metal pin into the first molten portion of the first solder region and the inserting the second end of the metal pin into the second molten portion of the second solder region are performed simultaneously. 4. The method of claim 1 , wherein the inserting the plurality of metal pins comprises: pouring an additional plurality of metal pins comprising the plurality of metal pins over the mold, wherein the mold comprises a plurality of holes; and vibrating the mold and the additional plurality of metal pins, wherein the plurality of metal pins is vibrated into the plurality of holes. 5. The method of claim 4 , wherein the dielectric film remains after the metal pin is bonded to the first solder region and the second solder region. 6. The method of claim 4 further comprising, after the solidifying the first molten portion of the first solder region and solidifying the second molten portion of the second solder region, removing the dielectric film. 7. A method comprising: forcing a plurality of metal pins to penetrate through a dielectric film, with both ends of each of the plurality of metal pins exposed, wherein the plurality of metal pins is formed of a non-solder metallic material; aligning the plurality of metal pins to have first ends of the plurality of metal pins to be coplanar with each other, and second ends of the plurality of metal pins to be coplanar with each other; aligning the plurality of metal pins to a first plurality of solder regions in a first package component, and a second plurality of solder regions in a second package component; melting the first plurality of solder regions and the second plurality of solder regions; inserting the plurality of metal pins into the first plurality of solder regions and the second plurality of solder regions; and solidifying the first plurality of solder regions and the second plurality of solder regions to bond the first plurality of solder regions and the second plurality of solder regions to the plurality of metal pins. 8. The method of claim 7 , wherein the first plurality of solder regions and the second plurality of solder regions are solidified simultaneously. 9. The method of claim 7 , wherein during the forcing a plurality of metal pins to penetrate through the dielectric film, the plurality of metal pins is not molten. 10. The method of claim 7 , wherein the aligning the plurality of metal pins comprises placing the plurality of metal pins into a plurality of holes in a mold. 11. The method of claim 10 , wherein the placing the plurality of metal pins into the plurality of holes comprises: pouring the plurality of metal pins over the mold; and setting the plurality of metal pins in the plurality of holes by vibrating the mold and the plurality of metal pins. 12. The method of claim 7 , wherein after the first plurality of solder regions is solidified, one of the plurality of metal pins is spaced apart from a metal pad of the first package component by a solder region therebetween. 13. The method of claim 7 , wherein after the first plurality of solder regions is solidified, one of the plurality of metal pins is physical disconnected from all metal pads of the first package component. 14. A method comprising: placing a plurality of metal pins, with each of the plurality of metal pins having a first end portion in one of a plurality of holes of a mold, and a second end portion protruding out of the mold; inserting the plurality of metal pins into a dielectric film, with a middle portion of each of the plurality of metal pins in the dielectric film, and the first end portion and the second end portion of each of the plurality of metal pins on opposite side of the dielectric film; and bonding the first end portions of the plurality of metal pins to a first plurality of solder regions in a first package component, and the second end portions of the plurality of metal pins to a second plurality of solder regions in a second package component. 15. The method of claim 14 , wherein the inserting the plurality of metal pins into a dielectric film comprises: dispensing a flowable compound; and curing the flowable compound into the dielectric film. 16. The method of claim 14 , wherein the inserting the plurality of metal pins into the dielectric film comprises: pre-forming the dielectric film; and penetrating the plurality of metal pins into the pre-formed dielectric film. 17. The method of claim 14 further comprising, after the bonding, removing the dielectric film. 18. The method of claim 14 , wherein the first end portion and the second end portion of each of the plurality of metal pins have substantially a same width. 19. The method of claim 1 , wherein the disposing the dielectric film comprises forcing the dielectric film against the plurality of metal pins in the plurality of holes to allow the plurality of metal pins to penetrate through the dielectric film. 20. The method of claim 1 , wherein the disposing the dielectric film comprises dispensing a flowable compound to encircle middle portions of the plurality of metal pins that is in the plurality of holes; and curing the flowable compound to form the dielectric film.

Assignees

Inventors

Classifications

  • between multiple chips · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between stacked chips · CPC title

  • characterised by the pads after the direct bonding · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

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Frequently asked questions

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What does patent US9418953B2 cover?
A package includes first package component and a second package component. The first package component includes a first electrical connector at a surface of the first package component, and a first solder region on a surface of the first electrical connector. The second package component includes a second electrical connector at a surface of the second package component, and a second solder reg…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W72/072. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 16 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).