Method for fabricating semiconductor device including silicon-containing layer and metal-containing layer, and conductive structure of the same

Patent metadata

Field	Value
Publication number	US-9418891-B2
Application number	US-201514962908-A
Country	US
Kind code	B2
Filing date	Dec 8, 2015
Priority date	Jul 26, 2012
Publication date	Aug 16, 2016
Grant date	Aug 16, 2016

Abstract

A method for fabricating a semiconductor device includes forming a silicon-containing layer; forming a metal-containing layer over the silicon-containing layer; forming an undercut prevention layer between the silicon containing layer and the metal containing layer; etching the metal-containing layer; and forming a conductive structure by etching the undercut prevention layer and the silicon-containing layer.

First claim

What is claimed is:

1. A method for fabricating a semiconductor device, comprising:
forming an interlayer dielectric layer over a semiconductor substrate;
forming a contact hole by etching the interlayer dielectric layer;
forming a preliminary plug filling the contact hole, wherein the preliminary plug includes a silicon-containing layer;
selectively etching back the silicon-containing layer; and
forming an undercut prevention layer formed over the etched back silicon-containing layer;
forming a metal-containing layer over the interlayer dielectric layer including the preliminary plug; and
forming a bit line and a bit line contact plug by etching the metal-containing layer and the preliminary plug.

2. The method of claim 1 , wherein the undercut prevention layer comprises chemical species for controlling an etch rate.

3. The method of claim 1 , wherein the undercut prevention layer comprises at least one of carbon and nitrogen.

4. The method of claim 1 , wherein a first polysilicon layer is formed as the silicon-containing layer, and a second polysilicon layer containing at least one of carbon and nitrogen is formed as the undercut prevention layer over the first polysilicon layer.

5. The method of claim 4 , wherein the first and second polysilicon layers comprise N-type or P-type impurities.

6. The method of claim 1 , wherein a polysilicon layer is formed as the silicon-containing layer, and the undercut prevention layer is formed by injecting at least one of carbon and nitrogen into an upper part of the polysilicon layer.

7. The method of claim 6 , wherein the polysilicon layer comprises N-type or P-type impurities.

8. The method of claim 1 , wherein the forming of the metal-containing layer comprises:
forming a tungsten-based metal barrier; and
forming a tungsten-based metal layer over the tungsten-based metal barrier.

Assignees

• Sk Hynix Inc

Inventors

• Rouh Kyong-Bong
• Na Shang-Koon
• Eun Yong-Seok
• Kim Su-Ho
• Kim Tae-Han
• Lee Mi-Ri

Classifications

• H10P50/268

  of silicon-containing layers · CPC title

• H10P50/267 Primary

  using plasmas · CPC title

• H10P50/71

  using masks for conductive or resistive materials · CPC title

• H10P14/40

  of conductive or resistive materials · CPC title

• H10D64/01312

  the additional layer comprising a metal or metal silicide formed by deposition, i.e. without a silicidation reaction, e.g. sputter deposition · CPC title