Semiconductor memory device
US-8976590-B2 · Mar 10, 2015 · US
US9417818B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9417818-B2 |
| Application number | US-201314031911-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 19, 2013 |
| Priority date | Sep 25, 2012 |
| Publication date | Aug 16, 2016 |
| Grant date | Aug 16, 2016 |
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A memory block area in a semiconductor memory includes program segments. Each program segment includes a group of memory cells arranged at positions where word lines and bit lines intersect and connected to a common source line. The word lines are shared by the program segments. At program operation time source line switches are used for supplying first voltage to a source line in a program segment, of the program segments, including a memory cell to be programmed and supplying second voltage to a source line in a program segment, of the program segments, not including the memory cell to be programmed.
Opening claim text (preview).
What is claimed is: 1. A semiconductor memory comprising: a plurality of memory blocks which each includes a group of memory cells arranged at positions where a group of word lines and a group of bit lines intersect and connected to a common source line; each memory cell, of the group of memory cells, including a gate directly connected to a word line of the group of word lines, a drain directly connected to a bit line of the group of bit lines and a source directly connected to t…
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