Semiconductor device and semiconductor device manufacturing method

US9415455B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9415455-B2
Application numberUS-201514721529-A
CountryUS
Kind codeB2
Filing dateMay 26, 2015
Priority dateJul 15, 2014
Publication dateAug 16, 2016
Grant dateAug 16, 2016

How to read this patent

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes a semiconductor element; an insulating substrate formed from stacking a rectangular shaped circuit plate, insulating plate, and metal plate, wherein the semiconductor element is fixed to the circuit plate, and the metal plate has at least one first groove portion in four corners thereof; a radiating member made of metal and having a predetermined arrangement area to dispose the insulating substrate, the radiating member having at least one second groove portion provided in four corners of the arrangement area; four positioning members disposed between the four corners of the metal plate and the four corners of the radiating member, each of the four positioning members being fitted to each of the first groove portions and second groove portions; and a solder filling a space between the insulating substrate and the radiating member, and covering the positioning members.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a semiconductor element; an insulating substrate having a rectangular shaped circuit plate, an insulating plate, and a metal plate, which are stacked together, wherein the semiconductor element is fixed to the circuit plate, and the metal plate has at least one first groove portion provided in four corners thereof; a radiating member made of metal and having a predetermined arrangement area to dispose the insulating substrate, the radiating member having at least one second groove portion provided in four corners of the arrangement area; four positioning members disposed between the four corners of the metal plate and the four corners of the radiating member, each of the four positioning members being fitted to the first groove portion and the second groove portion; and a solder filling a space between the insulating substrate and the radiating member, and covering the positioning members, wherein the metal plate has a top surface fixed directly to the insulating plate on a side opposite to the circuit plate, and a bottom surface opposite to the top surface formed with said at least one first groove portion, and a remainder of an entire bottom surface not formed with said at least one first groove portion is attached to the radiating member through the solder. 2. The semiconductor device according to claim 1 , wherein the first groove portion includes four groove portions each provided in each of the four corners of the metal plate, and the second groove portion includes four groove portions each provided in the four corners of the arrangement area. 3. The semiconductor device according to claim 1 , wherein the first groove portion has a depth in which a bottom portion of the first groove portion does not extend to the insulating plate. 4. The semiconductor device according to claim 1 , wherein the positioning member includes a first face, a second face, and a corner portion formed from the first face and the second face and disposed in one of the four corners of the insulating substrate. 5. The semiconductor device according to claim 4 , wherein the positioning member has an L-shape, a rectangular shape, or a triangular shape. 6. The semiconductor device according to claim 4 , wherein the first face and the second face of the positioning member are inclined to an inner side of the insulating substrate from a radiating member side toward an insulating substrate side. 7. The semiconductor device according to claim 1 , wherein the insulating substrate and radiating member are parallel. 8. The semiconductor device according to claim 1 , wherein said at least one second groove portion is arranged below said at least first groove portion, and at least one positioning member of the four positioning members is disposed in said at least one second groove portion and said at least first groove portion to position the insulating substrate to the predetermined arrangement area on the radiating member. 9. The semiconductor device according to claim 8 , wherein said at least one first groove portion provided in corners is arranged at a periphery of the metal plate. 10. A semiconductor device, comprising: a semiconductor element; an insulating substrate having a rectangular shaped circuit plate, an insulating plate, and a metal plate, which are stacked together, wherein the semiconductor element is fixed to the circuit plate, and the metal plate has at least one first groove portion provided in four corners thereof; a radiating member made of metal and having a predetermined arrangement area to dispose the insulating substrate, the radiating member having at least one second groove portion provided in four corners of the arrangement area; four positioning members disposed between the four corners of the metal plate and the four corners of the radiating member, each of the four positioning members being fitted to the first groove portion and the second groove portion; and a solder filling a space between the insulating substrate and the radiating member, and covering the positioning members, wherein the positioning member is formed from a material having copper, nickel, or iron as a main component, or a surface of the positioning member is covered with a material having copper, nickel, or iron as a main component. 11. A semiconductor device manufacturing method, comprising: a step of preparing an insulating substrate formed from stacking a rectangular shaped circuit plate, insulating plate, and metal plate, the metal plate having at least one first groove portion provided in four corners thereof; a step of preparing a radiating member made of metal, the radiating member having at least one second groove portion provided in four corners of an arrangement area disposing the insulating substrate; a step of fitting four positioning members in the second groove portion in the four corners of the arrangement area; a step of mounting a solder plate in the arrangement area; a step of fitting the four positioning members in the first groove portion in the four corners of the metal plate, to fix the insulating substrate to the arrangement area; a step of heating and melting the solder plate; a step of filling a space between the insulating substrate and the radiating member with a solder melted from the solder plate; and a step of cooling and hardening the melted solder. 12. The semiconductor device manufacturing method according to claim 11 , further comprising a step of covering the positioning member with the melted solder after the step of heating and melting the solder plate.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates · CPC title

  • H10W40/70Primary

    Fillings or auxiliary members in containers or in encapsulations for thermal protection or control · CPC title

  • Assembling together parts thereof · CPC title

  • being semiconducting · CPC title

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Frequently asked questions

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What does patent US9415455B2 cover?
A semiconductor device includes a semiconductor element; an insulating substrate formed from stacking a rectangular shaped circuit plate, insulating plate, and metal plate, wherein the semiconductor element is fixed to the circuit plate, and the metal plate has at least one first groove portion in four corners thereof; a radiating member made of metal and having a predetermined arrangement area…
Who is the assignee on this patent?
Fuji Electric Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W40/70. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 16 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).