Apparatus and method for correcting IQ imbalance

Patent metadata

Field	Value
Publication number	US-9413294-B2
Application number	US-201114129629-A
Country	US
Kind code	B2
Filing date	Jul 3, 2011
Priority date	Jul 3, 2011
Publication date	Aug 9, 2016
Grant date	Aug 9, 2016

Abstract

The subject matter discloses an apparatus residing within an RF chip, comprising:
a detection unit for detecting IQ mismatch in an IQ signal; an analog calibration module comprising a first analog calibration mechanism for calibrating IQ mismatch in the phase component and a second analog calibration mechanism for calibrating IQ mismatch in the amplitude component; and a control unit for determining a calibration sequence of the IQ signal.

First claim

What is claimed is:

1. An apparatus residing within a radio frequency (RF) chip, comprising:
a transmitter;
a receiver;
a processing unit comprising an automatic gain control (AGC) that is configured to detect an in-phase and quadrature (IQ) mismatch of a phase component of an IQ signal and an IQ mismatch of an amplitude component of the IQ signal;
an analog calibration module, included in the receiver, comprising a first analog calibration mechanism for calibrating the IQ mismatch in the phase component of the IQ signal and a second analog calibration mechanism for calibrating the IQ mismatch in the amplitude component of the IQ signal;
wherein the processing unit is also configured to determine a calibration sequence of the IQ signal;
wherein during a calibration of an IQ imbalance in the receiver, the processing unit is further configured to:
generate multiple test signals that differ from each other in a first phase and in a second phase that follows the first phase; wherein differences between consecutive test signals of the first phase are larger than differences between consecutive test signals of the second phase;
inject the multiple test signals, at different points in time, to the transmitter; wherein the transmitter outputs the multiple IQ signals in response to the injection of the multiple test signals;

wherein the receiver is configured to:
receive a RF signal output from the transmitter based on the output multiple IQ signals;
down-convert the received RF signal into an intermediate frequency (IF) signal,
provide the IF signal to the analog calibration module; and
output a receiver output signal, from the analog calibration module based on the IF signal, that forms the IQ signal.

2. The apparatus according to claim 1 , wherein the first analog calibration mechanism comprises an operational amplifier and a plurality of resistors.

3. The apparatus according to claim 1 , wherein the first analog calibration mechanism shifts a relative phase between an in-phase component and a quadrature component.

4. The apparatus according to claim 1 , wherein the second analog calibration mechanism comprises a dynamic resistor for manipulating the amplitude.

5. The apparatus according to claim 4 , wherein the second analog calibration mechanism comprises a digital to analog converter and a transistor for determining a resistance of the dynamic resistor for manipulating the amplitude.

6. The apparatus according to claim 1 , wherein the analog calibration module is configured to operate in predefined mismatch levels of IQ mismatch in the phase component and IQ mismatch in the amplitude component.

7. The apparatus according to claim 1 , further comprises a calibration crossing mechanism for canceling self mismatch of analog electrical components of the apparatus.

8. The apparatus according to claim 1 , wherein the multiple test signals has a first IF frequency; wherein the processing unit is configured to receive the IQ signal and to measure power at a second IF frequency that is double than the first IF frequency.

9. The apparatus according to claim 1 , wherein the processing unit is configured to detect an envelope of the IQ signal and to apply the AGC on the envelope.

10. The apparatus according to claim 1 , wherein the multiple test signals are of a first frequency and wherein the processing unit is configured to measure power at an image frequency that is opposite to the first frequency.

11. The apparatus according to claim 1 , comprising an additional analog calibration module; wherein the apparatus is configured to perform, while using the analog calibration module, a calibration of an IQ imbalance in the transmitter, and is configured to perform, while using the additional analog calibration module, a calibration of an IQ imbalance in the receiver.

Assignees

• Suissa Udi
• Cohen Avi
• Dsp Group Ltd

Inventors

• Suissa Udi
• Cohen Avi

Classifications

• H04L27/38

  Demodulator circuits; Receiver circuits · CPC title

• H04L27/364

  Arrangements for overcoming imperfections in the modulator, e.g. quadrature error or unbalanced I and Q levels · CPC title

• H04L27/0014 Primary

  Carrier regulation (of chaotic carriers H04L27/001; for multicarrier receivers H04L27/2657) · CPC title

• H03D3/009 Primary

  Compensating quadrature phase or amplitude imbalances · CPC title