Power conversion apparatus

Patent metadata

Field	Value
Publication number	US-9413261-B2
Application number	US-201313895976-A
Country	US
Kind code	B2
Filing date	May 16, 2013
Priority date	May 16, 2012
Publication date	Aug 9, 2016
Grant date	Aug 9, 2016

Abstract

According to one embodiment, a controller determines the polarity of the input voltage detected by an input voltage detector. Then, when the polarity of the input voltage is positive, the first switch is subject to pulse driving, and when the polarity of the input voltage is negative, the second switch is subject to pulse driving, where the pulse driving is carried out at an on/off timing determined on the basis of the respective detection outputs of an input voltage detector, an input current detector, an output voltage detector, and an output current detector.

First claim

What is claimed is:

1. A method of converting AC power to a DC output, comprising:
providing a first LC circuit including a first current detector, a power supply, a first capacitor, a first inductor, and a first switch group including a first switch and a first diode that are connected in parallel, wherein the first switch group is connected in series with the first current detector, the power supply, the first capacitor, and the first inductor;
providing a second LC circuit including a second current detector, a load, a second capacitor, and a second inductor; wherein the second LC circuit is connected to the first switch group in parallel;
providing a second switch group including a second switch and a second diode that are connected in parallel, wherein the second switch group is connected to the first switch group in series through an intermediate node, and a smoothing capacitor and the second switch group are connected in series between ground and the intermediate node; and
selectively opening and closing the first and second switches, in response to at least an input polarity of the power supply to provide a DC current to the load.

2. The method of claim 1 , further including the steps of:
providing a controller;
providing an input voltage and input current detector; and
opening and closing the first and second switches with the controller based upon the detected values of input voltage and input current.

3. The method of claim 2 , further including the steps of:
providing a load voltage and load current detector; and
opening and closing the first and second switches with the controller based upon the detected values of load voltage and load current.

4. The method of claim 3 , wherein at least one of the first and second switches is closed and opened at a frequency greater than a power supply input frequency.

5. The method of claim 1 , further including the steps of detecting an interruption in power supplied by the power supply; and
alternately opening and closing the first switch and the second switch when the interruption in power is detected.

6. The method of claim 1 , further including the steps of:
detecting an impedance of the load; and
if the impedance exceeds a threshold value, maintaining both the first switch and the second switch in an open position.

7. The method of claim 1 , further including the step of maintaining the first switch and the second switch in an open position in response to a sleep command.

Assignees

• Toshiba Tec Kk

Inventors

• Usami Yutaka

Classifications

• H02M7/04 Primary

  by static converters · CPC title

• H02M7/217

  using semiconductor devices only · CPC title

• H02M7/05 Primary

  Capacitor coupled rectifiers · CPC title

• H02M1/0009

  Devices or circuits for detecting current in a converter · CPC title