Electrical contact

Patent metadata

Field	Value
Publication number	US-9412886-B2
Application number	US-201113214780-A
Country	US
Kind code	B2
Filing date	Aug 22, 2011
Priority date	Aug 20, 2010
Publication date	Aug 9, 2016
Grant date	Aug 9, 2016

Abstract

A photovoltaic device with a low-resistance stable electrical back contact is disclosed. The photovoltaic device can have a CuTe x or CuTe x N y layer.

First claim

What is claimed is:

1. A method for manufacturing a photovoltaic module comprising:
forming a semiconductor absorber layer over a substrate, the semiconductor absorber layer comprising cadmium telluride;
forming a low-resistance contact layer over the semiconductor absorber layer in which copper is bound in a chemically stable phase, the low-resistance contact layer comprising a copper telluride nitride with a formula of CuTe x N y wherein x is in the range of 0.2 to 1 and y is less than 0.1;
forming a diffusion barrier layer over the low-resistance contact layer; and
forming a metal back contact layer over the diffusion barrier layer.

2. The method of claim 1 , further comprising providing a copper diffusion source layer between the semiconductor absorber layer and the low-resistance contact layer.

3. The method of claim 1 , further comprising providing a semiconductor window layer between the semiconductor absorber layer and the substrate.

4. The method of claim 3 , wherein the semiconductor window layer comprises cadmium sulfide.

5. The method of claim 1 , further comprising providing a transparent conductive oxide layer between the semiconductor absorber layer and the substrate.

6. The method of claim 5 , wherein the transparent conductive oxide layer comprises at least one material selected from the group consisting of cadmium stannate, cadmium oxide, indium oxide, cadmium indium oxide, tin oxide, zinc oxide, and zinc tin oxide.

7. The method of claim 1 , wherein the low-resistance contact layer has a thickness in the range of about 5 angstrom to about 1000 angstrom.

8. The method of claim 1 , wherein forming the low-resistance contact layer comprises a sputtering or laser ablation to deposit copper telluride from a Cu—Te alloyed or compound target.

9. The method of claim 1 , wherein forming the low-resistance contact layer comprises a sputtering with a gas ambient comprising at least one material selected from the group consisting of He, Ne, Ar, Kr, Xe, and N 2 .

10. The method of claim 1 , wherein forming the low-resistance contact layer comprises a co-evaporation from Cu and Te sources.

11. The method of claim 1 , wherein forming the low-resistance contact layer comprises a chemical vapor deposition or atomic layer deposition from copper and tellurium precursors.

12. The method of claim 1 , wherein forming the low-resistance contact layer comprises a chemical vapor deposition from copper and tellurium precursors with a gas ambient comprising at least one material selected from the group consisting of Ar, N 2 , H 2 , NH 3 , trimethylamine, CH 4 , and C 2 H 6 .

13. The method of claim 1 , wherein providing the low-resistance contact layer comprises a sputtering in a reactive gas ambient comprising at least one material selected from the group consisting of H 2 , CH 4 , NH 3 , C 2 H 6 , C 2 H 2 , and C 2 H 4 .

14. The method of claim 1 , wherein providing the low-resistance contact layer comprises a plating deposition of copper telluride.

15. The method of claim 1 , wherein the diffusion barrier layer has a thickness in the range of about 10 angstrom to about 1000 angstrom.

16. The method of claim 1 , wherein the diffusion barrier layer comprises at least one material selected from the group consisting of Ta, W, Ru, MoN x , TiN x , HfN x , ZrN x , TaN x , WN x , TiB x , HfB x , ZrB x , TaBx or any combination.

17. The method of claim 1 , wherein forming the diffusion barrier layer comprises a deposition process selected from the group consisting of sputtering, chemical vapor deposition, roll-application, ink-jet spray, and laser ablation.

18. The method of claim 1 , wherein forming the diffusion barrier layer comprises a deposition process selected from the group consisting of sputtering, evaporation, laser ablation, and wet-chemical process.

19. The method of claim 1 , further comprising forming a buffer layer between the low-resistance contact layer and the semiconductor absorber layer.

20. A photovoltaic device comprising:
a substrate;
a semiconductor absorber layer over the substrate, the semiconductor absorber layer comprising cadmium telluride;
a low-resistance contact layer over the semiconductor absorber layer in which copper is bound in a chemically stable phase, the low-resistance contact layer comprising a copper telluride nitride with a formula of CuTe x N y wherein x is in the range of 0.2 to 1 and y is less than 0.1;
a diffusion barrier layer over the low-resistance contact layer; and
a metal back contact layer over the diffusion barrier layer.

21. The photovoltaic device of claim 20 , further comprising a copper diffusion source layer between the semiconductor absorber layer and the low-resistance contact layer.

22. The photovoltaic device of claim 20 , wherein the low-resistance contact layer has a thickness in the range of about 5 angstrom to about 1000 angstrom.

23. The photovoltaic device of claim 20 , wherein the diffusion barrier layer has a thickness in the range of about 10 angstrom to about 1000 angstrom.

24. The photovoltaic device of claim 20 , wherein the diffusion barrier layer comprises at least one material selected from the group consisting of Ta, W, Ru, MoN x , TiN x , HfN x , ZrN x , TaN x , WN x , TiB x , HfB x , ZrB x , TaB x or any combination.

25. The photovoltaic device of claim 20 , further comprising a buffer layer between the low-resistance contact layer and the semiconductor absorber layer.

26. A photovoltaic module comprising:
a substrate;
a plurality of photovoltaic devices formed on the substrate, wherein at least one of the photovoltaic devices comprises:
a semiconductor absorber layer over the substrate, the semiconductor absorber layer comprising cadmium telluride;
a low-resistance contact layer over the semiconductor absorber layer in which copper is bound in a chemically stable phase, the low-resistance contact layer comprising a copper telluride nitride with a formula of CuTe x N y wherein x is in the range of 0.2 to 1 and y is less than 0.1; a diffusion barrier layer over the low-resistance contact layer; and
a metal back contact layer over the diffusion barrier layer; and
a back support adjacent to the back contact layer.

27. The photovoltaic module of claim 26 , further comprising: a buffer layer between the low-resistance contact layer and the semiconductor absorber layer; and a copper diffusion source layer between the buffer layer and the low-resistance contact layer.

28. A method for manufacturing a photovoltaic module comprising:
forming a semiconductor absorber layer over a substrate, the semiconductor absorber layer comprising cadmium telluride;
forming a copper diffusion source layer over the semiconductor absorber layer;
forming a low-resistance contact layer over the semiconductor absorber layer, the low-resistance contact layer comprising a copper telluride nitride with a formula of CuTe x N y wherein x is in the range of 0.2 to 1 and y is less than 0.1;
forming a diffusion barrier layer over the low-resistance contact layer, wherein the diffusion barrier layer comprises at least one material selected from the group consisting of Ta, W, Ru, MoN x , HfN x , ZrN x , TaN x , WN x , TiB x , HfB x , ZrB x , TaB x or any combination; and
forming a metal back contact layer over the diffusion barrier layer.

Assignees

• Addepalli Pratima V
• Jayaraman Sreenivas
• Karpenko Oleh P
• First Solar Inc

Inventors

• Addepalli Pratima V
• Jayaraman Sreenivas
• Karpenko Oleh P

Classifications

• H10F77/1696

  the films including Group II-VI materials, e.g. CdTe or CdS · CPC title

• H10F77/1694

  the films including Group I-III-VI materials, e.g. CIS or CIGS · CPC title

• H10F77/244

  made of transparent conductive layers, e.g. transparent conductive oxide [TCO] layers · CPC title

• H10F77/169

  Thin semiconductor films on metallic or insulating substrates · CPC title

• H10F77/123

  comprising only Group II-VI materials, e.g. CdS, ZnS or HgCdTe · CPC title