Semiconductor device

Patent metadata

Field	Value
Publication number	US-9412876-B2
Application number	US-201514608224-A
Country	US
Kind code	B2
Filing date	Jan 29, 2015
Priority date	Feb 7, 2014
Publication date	Aug 9, 2016
Grant date	Aug 9, 2016

Abstract

The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. Furthermore, the first transistor provided in the driver circuit portion may include the oxide semiconductor film in which a first film and a second film are stacked, and the second transistor provided in the pixel portion may include the oxide semiconductor film which differs from the first film in the atomic ratio of metal elements.

First claim

What is claimed is:

1. A semiconductor device comprising:
a first transistor in a driver portion over a surface; and
a second transistor in a pixel portion over the surface,
wherein the first transistor comprises:
a first oxide semiconductor film comprising a first region, a second region, and a third region, the second region between the first region and the third region;
a first insulating film over the first oxide semiconductor film;
a gate electrode overlapping with the second region of the first oxide semiconductor film with the first insulating film interposed therebetween;
a second insulating film over the gate electrode and the first oxide semiconductor film; and
a source electrode and a drain electrode over the second insulating film,

wherein the second insulating film is a nitride insulating film,
wherein each of the first region and the third region of the first oxide semiconductor film is in contact with the second insulating film,
wherein the first oxide semiconductor film has a multilayer structure comprising a first oxide semiconductor layer and a second oxide semiconductor layer on and in contact with the first oxide semiconductor layer,
wherein a composition of metal elements in the first oxide semiconductor layer is different from a composition of metal elements in the second oxide semiconductor layer,
wherein the second transistor comprises:
a second oxide semiconductor film comprising a first region, a second region, and a third region, the second region between the first region and the third region;
a third insulating film over the second oxide semiconductor film;
a gate electrode overlapping with the second region of the second oxide semiconductor film with the third insulating film interposed therebetween;
the second insulating film over the gate electrode and the second oxide semiconductor film; and
a source electrode and a drain electrode over the second insulating film,

wherein each of the first region and the third region of the second oxide semiconductor film is in contact with the second insulating film, and
wherein the first oxide semiconductor film is thicker than the second oxide semiconductor film.

2. The semiconductor device according to claim 1 , wherein the composition of the metal elements in the second oxide semiconductor layer is same as a composition of metal elements in the second oxide semiconductor film.

3. The semiconductor device according to claim 1 , wherein the second oxide semiconductor layer is on and in contact with an upper surface and a side surface of the first oxide semiconductor layer.

4. The semiconductor device according to claim 1 , wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the second oxide semiconductor film comprises indium, gallium, and zinc.

5. The semiconductor device according to claim 4 , wherein a composition of indium in the first oxide semiconductor layer is larger than a composition of indium in the second oxide semiconductor layer.

6. The semiconductor device according to claim 1 , wherein a thickness of the first oxide semiconductor layer is larger than a thickness of the second oxide semiconductor layer.

7. The semiconductor device according to claim 1 ,
wherein the gate electrode in each of the first transistor and the second transistor comprises:
a first conductive film; and
a second conductive film on and in contact with the first conductive film, and

wherein a lower end portion of the first conductive film does not overlap with the second conductive film.

8. The semiconductor device according to claim 1 , wherein the first region and the third region in each of the first transistor and the second transistor comprise an impurity element.

9. The semiconductor device according to claim 8 , wherein the impurity element is at least one selected from the group consisting of hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, chlorine, and a rare gas element.

10. A semiconductor device comprising:
a first transistor in a driver portion over a surface;
a second transistor in a pixel portion over the surface; and
a third transistor in the pixel portion over the surface,
wherein the first transistor comprises:
a first oxide semiconductor film comprising a first region, a second region, and a third region, the second region between the first region and the third region;
a first insulating film over the first oxide semiconductor film;
a gate electrode overlapping with the second region of the first oxide semiconductor film with the first insulating film interposed therebetween;
a second insulating film over the gate electrode and the first oxide semiconductor film; and
a source electrode and a drain electrode over the second insulating film,

wherein the second insulating film is a nitride insulating film,
wherein each of the first region and the third region of the first oxide semiconductor film is in contact with the second insulating film,
wherein the first oxide semiconductor film comprises a first oxide semiconductor layer and a second oxide semiconductor layer on and in contact with the first oxide semiconductor layer,
wherein a composition of metal elements in the first oxide semiconductor layer is different from a composition of metal elements in the second oxide semiconductor layer,
wherein the second transistor comprises:
a second oxide semiconductor film comprising a first region, a second region, and a third region, the second region between the first region and the third region;
a third insulating film over the second oxide semiconductor film;
a gate electrode overlapping with the second region of the second oxide semiconductor film with the third insulating film interposed therebetween;
the second insulating film over the gate electrode and the second oxide semiconductor film; and
a source electrode and a drain electrode over the second insulating film,

wherein each of the first region and the third region of the second oxide semiconductor film is in contact with the second insulating film,
wherein the third transistor comprises:
a third oxide semiconductor film comprising a first region, a second region, and a third region, the second region between the first region and the third region;
a fourth insulating film over the third oxide semiconductor film;
a gate electrode overlapping with the second region of the third oxide semiconductor film with the fourth insulating film interposed therebetween;
the second insulating film over the gate electrode and the third oxide semiconductor film; and
a source electrode and a drain electrode over the second insulating film,

wherein each of the first region and the third region of the third oxide semiconductor film is in contact with the second insulating film,
wherein the third oxide semiconductor film comprises a third oxide semiconductor layer and a fourth oxide semiconductor layer on and in contact with the third oxide semiconductor layer,
wherein a composition of metal elements in the third oxide semiconductor layer is different from a composition of metal elements in the fourth oxide semiconductor layer, and
wherein the first oxide semiconductor film and the third oxide semiconductor film are thicker than the second oxide semiconductor film.

11. The semiconductor device according to claim 10 , wherein the composition of the metal elements in the second oxide semiconductor layer and the composition of the metal elements in the fourth oxide semiconductor layer are same as a composition of metal elements in the second oxide semiconductor film.

12. The semiconductor device according to claim 10 ,
wher

Assignees

• Semiconductor Energy Lab

Inventors

• Koezuka Junichi
• Jintyou Masami
• Shima Yukinori
• Kurosaki Daisuke
• Nakada Masataka
• Yamazaki Shunpei

Classifications

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• H10D30/6704

  having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device · CPC title

• H10D30/6755

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10D86/60 Primary

  wherein the TFTs are in active matrices · CPC title