Organic light emitting diode, organic light emitting display panel including the organic light emitting diode and method of manufacturing the organic light emitting display panel
US-9224970-B2 · Dec 29, 2015 · US
US9412801B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9412801-B2 |
| Application number | US-201213622799-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 19, 2012 |
| Priority date | Sep 20, 2011 |
| Publication date | Aug 9, 2016 |
| Grant date | Aug 9, 2016 |
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An OLED display device includes a display area of a substrate to display images; a non-display area surrounding the display area and applying signals to pixels within the display area; a first thin film transistor formed in the non-display area of the substrate; a second thin film transistor formed in the display area of the substrate; a planarization film formed over the first and second thin film transistors; a first electrode formed on the planarization film in the non-display area and formed with at least one first opening; a second electrode formed on the planarization film and connected to a electrode of the second thin film transistor; a bank pattern formed on the second electrode and the first electrode and exposing a part of the second electrode. The bank pattern is adjacent to the first electrode.
Opening claim text (preview).
What is claimed is: 1. An organic light-emitting diode display device comprising: a display area defined on a substrate and configured to display images; a non-display area defined on the substrate to include the periphery of the display area and configured to apply signals to pixels within the display area; a first thin film transistor on the non-display area of the substrate; a second thin film transistor on the display area of the substrate; a passivation layer on the first thin film transistor and the second thin film transistor; a planarization film on the passivation layer; a first electrode on the planarization film in the non-display area and including at least one first opening; a second electrode on the planarization film within the display area and connected to an electrode of the second thin film transistor; a bank pattern directly on the second electrode and the first electrode, the bank pattern configured to define light-emission cells and expose a part of the second electrode, wherein the bank pattern is arranged to be adjacent to the first electrode within the non-display area, the bank pattern extending over a conductive pattern in the non-display area to connect to the first electrode to a supply voltage source; an organic light-emitting layer formed directly on the second electrode; and a third electrode formed directly on the organic light-emitting layer, wherein the first electrode is directly connected to the third electrode within the non-display area, wherein the at least one first opening of the first electrode is placed in a gate-in-panel (GIP) area in the non-display area. 2. The organic light-emitting diode display device of claim 1 , wherein the second electrode of an outer pixel within the display area is spaced a distance from the first electrode within the non-display area by a second opening. 3. The organic light-emitting diode display device of claim 2 , wherein the distance is a single pixel width. 4. The organic light-emitting diode display device of claim 1 , wherein the second electrode within the display area and the first electrode within the non-display area are formed from a same material and through a same process. 5. The organic light-emitting diode display device of one of claim 1 , wherein the second electrode within the display area and the first electrode within the non-display area each include: a transparent electrode formed from one of indium-tin-oxide (ITO), tin-oxide (TO), indium-zinc-oxide (IZO) and indium-tin-zinc-oxide (ITZO); a silver layer formed on the transparent electrode; and a secondary transparent electrode formed on the silver layer. 6. The organic light-emitting diode display device of claim 1 , wherein the non-display area includes: a circuit area in which the first thin film transistor is disposed; and a ground contact area positioned at an outer side of the circuit area and used for a ground connection. 7. A method for manufacturing an organic light-emitting diode display device, the method comprising: preparing a substrate defined into a display area configured to display images, and a non-display area around the display area; forming a first film transistor within the non-display area of the substrate; forming a second thin film transistor within the display area of the substrate; forming a passivation layer on the first film transistor and the second thin film transistor; forming a planarization film with a first contact hole exposing a part of an electrode of the second thin film transistor, on the substrate provided with the first and second thin film transistors; forming a first electrode in the non-display area with at least one first opening and facing the first thin film transistor, on the planarization film provided with the first contact hole, and a second electrode in the display area connected to the electrode of the second thin film transistor; forming a bank pattern with an opening exposing a part of the second electrode, directly on the first electrode and the second electrode, wherein the bank pattern defines light-emission cells and is arranged to be adjacent to the first electrode within the non-display area, the bank pattern extending over a conductive pattern that connects the first electrode in the non-display area to ground voltage; forming an organic light-emitting layer directly on the second electrode; and forming a third electrode directly on the organic light-emitting layer, wherein the first electrode is directly connected to the third electrode in the non-display area, wherein the at least one first opening of the first electrode is placed in a gate-in-panel (GIP) area in the non-display area. 8. The method of claim 7 , wherein the second electrode in the display area of an outer pixel within the display area is spaced a distance from the first electrode in the non-display area by a second opening. 9. The method of claim 8 , wherein the distance is a single pixel width. 10. The method of claim 8 , wherein the second opening in the non-display area is formed at the same time as the first opening in the non-display area. 11. The method of claim 7 , wherein the second electrode in the display area and the first electrode in the non-display area each include: a transparent electrode formed from one of indium-tin-oxide (ITO), tin-oxide (TO), indium-zinc-oxide (IZO) and indium-tin-zinc-oxide (ITZO); a silver layer formed on the transparent electrode; and a secondary transparent electrode formed on the silver layer. 12. The organic light-emitting diode display device of claim 1 , wherein the first electrode within the non-display area includes a plurality of first openings and wherein the plurality of the first openings are spaced a fixed interval from one another. 13. The organic light-emitting diode display device of claim 1 , wherein the first electrode within the non-display area includes a second opening and wherein the second opening is spaced a distance from the second electrode of an outer pixel within the display area. 14. The organic light-emitting diode display device of claim 1 , wherein the first and second openings allow for out-gassing of materials from the planarization film within the non-display area to be exhausted to the bank pattern within the non-display area. 15. The organic light-emitting diode display device of claim 1 , wherein the non-display area comprises: a circuit area having the first thin film transistor; and a ground contact area at an outer side of the circuit area and having a conductive pattern configured to electrically connect an external ground source, wherein the conductive pattern is electrically connected to the first electrode. 16. An apparatus comprising: a display area defined on a substrate and configured to display images; a non-display area defined on the substrate to include the periphery of the display area and configured to apply signals to pixels within the display area; a first thin film transistor on the non-display area of the substrate; a second thin film transistor on the display area of the substrate; a passivation layer on the first thin film transistor and the second thin film transistor; a planarization film on the passivation layer; a first electrode on the planarization film in the non-display area and including at least one first opening; a second electrode on the planarization film within the display area and connected to an electrode of the second thin film transistor; a bank pattern directly on the second electrode and the first electrode, the bank pattern configured to define light-emission cells and
combined with auxiliary electrodes · CPC title
Interconnections, e.g. scanning lines · CPC title
wherein the TFTs are in active matrices · CPC title
characterised by multiple TFTs · CPC title
Electricity · mapped topic
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