Display driver circuitry for liquid crystal displays with semiconducting-oxide thin-film transistors

Patent metadata

Field	Value
Publication number	US-9412799-B2
Application number	US-201414228098-A
Country	US
Kind code	B2
Filing date	Mar 27, 2014
Priority date	Aug 26, 2013
Publication date	Aug 9, 2016
Grant date	Aug 9, 2016

Abstract

An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

First claim

What is claimed is:

1. A display, comprising:
a substrate;
an array of display pixel circuits on the substrate; and
display driver circuitry that drives gate line signals into the array of display pixel circuits, wherein the display driver circuitry includes level shifter circuitry, a shift register coupled to the level shifter circuitry, and buffer circuitry coupled to the level shifter circuitry, wherein the shift register supplies signals with a first voltage swing, wherein the level shifter circuitry adjusts the first voltage swing to a second voltage swing, and wherein the buffer circuitry receives the signals from the shift register with the first voltage swing and receives signals from the level shifter circuitry with the second voltage swing.

2. The display defined in claim 1 wherein the array of display pixel circuits includes semiconducting oxide thin-film transistor circuitry.

3. The display defined in claim 2 wherein the display driver circuitry includes a silicon thin-film transistor formed on the substrate.

4. The display defined in claim 3 wherein the display driver circuitry includes gate driver circuitry and wherein the level shifter circuitry forms part of the gate driver circuitry.

5. The display defined in claim 4 wherein the buffer circuitry produces the gate line signals.

6. A display, comprising:
a substrate;
an array of display pixel circuits on the substrate, wherein the display pixel circuits include semiconducting oxide thin-film transistors; and
display driver circuitry formed from silicon thin-film transistors on the substrate, wherein the display driver circuitry includes gate driver circuitry and wherein the gate driver circuitry includes level shifter circuitry, a shift register coupled to the level shifter circuitry, and buffer circuitry coupled to the level shifter circuitry, wherein the shift register supplies signals with a first voltage swing, wherein the level shifter circuitry adjusts the first voltage swing to a second voltage swing, and wherein the buffer circuitry receives the signals from the shift register with the first voltage swing and receives signals from the level shifter circuitry with the second voltage swing.

7. The display defined in claim 6 wherein the gate driver circuitry drives gate line signals into the array of display pixel circuits.

8. The display defined in claim 7 wherein the semiconducting oxide thin-film transistors each have a semiconducting-oxide channel region and wherein the silicon thin-film transistors each have a polysilicon channel region.

9. A display, comprising:
an array of semiconducting-oxide thin-film transistor display pixel circuits on a substrate; and
silicon thin-film transistor gate driver circuitry on the substrate that includes buffer circuitry, a level shifter, and shift register circuitry coupled to the level shifter, wherein the level shifter receives signals with a first voltage swing from the shift register circuitry and adjusts the first voltage swing to a second voltage swing, wherein the buffer circuitry receives the signals from the shift register circuitry with the first voltage swing and receives signals from the level shifter with the second voltage swing, and wherein the silicon thin-film transistor gate driver circuitry controls the array of semiconducting-oxide thin-film transistor display pixel circuits.

10. The display defined in claim 9 wherein the silicon thin-film transistor circuitry includes silicon thin-film transistors each having a polysilicon channel region.

11. The display defined in claim 10 wherein the buffer circuitry provides gate line signals to the array of semiconducting-oxide thin-film transistor display pixel circuits.

Assignees

• Apple Inc

Inventors

• Chang Shih Chang
• Hung Ming-Chin
• Yu Cheng-Ho
• Chang Ting-Kuo
• Kim Kyung-Wook
• Huang Chun-Yao
• Lee Szu-Hsien
• Chen Yu-Cheng
• Osawa Hiroshi

Classifications

• H10D86/481 Primary

  integrated with passive devices, e.g. auxiliary capacitors · CPC title

• H10D86/471

  having different architectures, e.g. having both top-gate and bottom-gate TFTs · CPC title

• H10D86/423

  comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

• H10D86/421

  having a particular composition, shape or crystalline structure of the active layer · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title