Multiheight electrically conductive via contacts for a multilevel interconnect structure

US9412753B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9412753-B2
Application numberUS-201414501441-A
CountryUS
Kind codeB2
Filing dateSep 30, 2014
Priority dateSep 30, 2014
Publication dateAug 9, 2016
Grant dateAug 9, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of making multi-level contacts includes providing an in-process multilevel device having a device region and a contact region including a stack of a plurality of alternating sacrificial layers and insulator layers located over a major surface of a substrate. A contact mask with at least one contact mask opening and at least one first terrace mask opening is provided over the stack, where the at least one first terrace mask opening is larger than the at least one contact mask opening. At least one first contact opening and at least one first terrace opening are simultaneously formed extending substantially perpendicular to the major surface of the substrate through the stack to a first sacrificial layer by etching a portion of the stack through the at least one contact mask opening and the at least one first terrace mask opening. A first electrically conductive via contact is deposited in the at least one first contact opening.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of making multi-level contacts, comprising: providing an in-process multilevel device comprising a device region and a contact region comprising a stack of plurality of alternating sacrificial layers and insulating layers located over a major surface of a substrate; providing a first contact mask with at least one first contact mask opening and at least one first terrace mask opening over the stack, wherein the at least one first terrace mask opening is larger than the at least one first contact mask opening; simultaneously forming at least one first contact opening and at least one first terrace opening extending substantially perpendicular to the major surface of the substrate through the stack to a first sacrificial layer by etching a portion of the stack through the at least one first contact mask opening and the at least one first terrace mask opening; detecting an end point of the etching when the at least one terrace opening reaches the first sacrificial layer and stopping the etching of the stack to form both the at least one first contact opening and at least one first terrace opening when the end point of the etching is detected; removing the first contact mask; providing a second contact mask with at least one second contact mask opening and at least one second terrace mask opening over the stack, wherein the at least one second terrace mask opening is larger than the at least one second contact mask opening; simultaneously forming at least one second contact opening and at least one second terrace opening extending substantially perpendicular to the major surface of the substrate through the stack to a second sacrificial layer by etching a portion of the stack through the at least one second contact mask opening and the at least one second terrace mask opening; depositing a first electrically conductive via contact in the at least one first contact opening; and depositing a second electrically conductive via contact in the at least one second contact opening. 2. The method of claim 1 , further comprising: removing the second contact mask; providing a third contact mask with at least one third contact mask opening and at least one third terrace mask opening over the stack, wherein the at least one third terrace mask opening is larger than the at least one third contact mask opening; simultaneously forming at least one third contact opening and at least one third terrace opening extending substantially perpendicular to the major surface of the substrate through the stack to a third sacrificial layer by etching a portion of the stack through the at least one third contact mask opening and the at least one third terrace mask opening; and depositing a third electrically conductive via contact in the at least one third contact opening. 3. The method of claim 2 , further comprising: simultaneously forming an insulating liner on a sidewall of the at least one first contact opening, the at least one second contact opening, and the at least one third contact opening, prior to depositing the first electrically conductive via contact; simultaneously forming an insulating layer in the at least one first terrace opening, the at least one second terrace opening, and the at least one third terrace opening; forming at least one first terrace contact opening, at least one second terrace contact opening, and at least one third terrace contact opening in the insulating layer; depositing a first electrically conductive terrace via contact in the at least one first terrace contact opening; depositing a second electrically conductive terrace via contact in the at least one second terrace contact opening; and depositing a third electrically conductive terrace via contact in the at least one third terrace contact opening. 4. The method of claim 3 , wherein forming the insulating liner comprises: depositing an insulating material on the sidewall and bottom surface of the at least one first contact opening, the at least one second contact opening, and the at least one third contact opening; and removing the insulating material from the bottom surface of the at least one first contact opening, the at least one second contact opening, and the at least one third contact opening. 5. The method of claim 3 , wherein depositing the first electrically conductive terrace via contact, depositing the second electrically conductive terrace via contact, and depositing the third electrically conductive terrace via contact comprise a same deposition step. 6. The method of claim 3 , further comprising: forming a trench through the stack; and selectively removing the sacrificial layers from the stack through at least one of the at least one first contact opening, the at least one second contact opening, the at least one third contact opening, and the trench to form a plurality of recesses; wherein the plurality of recesses comprise a first recess in the first device level and a second recess in the second device level. 7. The method of claim 6 , further comprising: forming a plurality of semiconductor channels, wherein at least one end portion of each of the plurality of semiconductor channels extends substantially perpendicular to the major surface of the substrate in the device region; forming a plurality of charge storage regions, each charge storage region located adjacent to a respective one of the plurality of semiconductor channels; and forming a plurality of electrically conductive electrodes in the plurality of recesses through the trench; wherein: a first electrically conductive electrode of the plurality of electrically conductive electrodes comprises a first control gate electrode which is formed in the first recess and extends around the second contact opening; a second electrically conductive electrode of the plurality of electrically conductive electrodes comprises a second control gate electrode which is formed in the second recess; the insulating liner on the sidewall of the first contact opening electrically isolates the second control gate electrode deposited in the second recess from the first electrically conductive via contact; and the device comprises a vertical NAND device. 8. The method of claim 7 , further comprising removing an electrically conductive electrode material of the plurality of electrically conductive electrodes from the trench, forming a trench insulating layer on a sidewall of the trench, and forming a source line in the trench such that the source line electrically contacts a portion of the device region of the device. 9. The method of claim 1 , wherein: the first contact mask, the second contact mask and the third contact mask comprise a respective first, second and third photoresist layers; the second sacrificial layer extends in a direction parallel to the major surface of the substrate past the first sacrificial layer in the at least one third terrace opening; the third sacrificial layer extends in a direction parallel to the major surface of the substrate past the second sacrificial layer in the at least one third terrace opening; the first, second and third sacrificial layers form a stepped pattern in the at least one third terrace opening; the first sacrificial layer is located in a first device level and the second sacrificial layer is located in a second device level lower than the first device level; and the first sacrificial layer extends around the at least one second contact opening.

Assignees

Inventors

Classifications

  • in via holes or trenches · CPC title

  • Vias, e.g. via plugs · CPC title

  • using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title

  • H10W20/083Primary

    the openings being via holes penetrating underlying conductors · CPC title

  • Electricity · mapped topic

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Frequently asked questions

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What does patent US9412753B2 cover?
A method of making multi-level contacts includes providing an in-process multilevel device having a device region and a contact region including a stack of a plurality of alternating sacrificial layers and insulator layers located over a major surface of a substrate. A contact mask with at least one contact mask opening and at least one first terrace mask opening is provided over the stack, whe…
Who is the assignee on this patent?
Sandisk Technologies Inc, Sandisk Technologies Llc
What technology area does this patent fall under?
Primary CPC classification H10W20/083. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 09 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).