Semiconductor device and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-9412060-B2
Application number	US-201414500343-A
Country	US
Kind code	B2
Filing date	Sep 29, 2014
Priority date	Jul 27, 2007
Publication date	Aug 9, 2016
Grant date	Aug 9, 2016

Abstract

A semiconductor device capable of wireless communication, which has high reliability in terms of resistance to external force, in particular, pressing force and can prevent electrostatic discharge in an integrated circuit without preventing reception of an electric wave. The semiconductor device includes an on-chip antenna connected to the integrated circuit and a booster antenna which transmits a signal or power included in a received electric wave to the on-chip antenna without contact. In the semiconductor device, the integrated circuit and the on-chip antenna are interposed between a pair of structure bodies formed by impregnating a fiber body with a resin. One of the structure bodies is provided between the on-chip antenna and the booster antenna. A conductive film having a surface resistance value of approximately 10 6 to 10 14 Ω/cm 2 is formed on at least one surface of each structure body.

First claim

What is claimed is:

1. A semiconductor device comprising:
a first conductive layer;
a second conductive layer wirelessly connected to the first conductive layer;
a first circuit for rectifying an alternating-current voltage electrically connected to the second conductive layer;
a regulator circuit electrically connected to the first circuit for rectifying the alternating-current voltage; and
a second circuit electrically connected to the regulator circuit,
wherein the first conductive layer and the second conductive layer are configured to be electromagnetically coupled to each other,
wherein the first circuit for rectifying the alternating-current voltage is configured to rectify an alternating-current voltage generated in the second conductive layer, and generate a rectified voltage,
wherein the regulator circuit is configured to adjust a level of the rectified voltage, and generate an adjusted voltage,
wherein the regulator circuit supplies the adjusted voltage to the second circuit,
wherein the first conductive layer is loop-shaped,
wherein a part of the second conductive layer is loop-shaped,
wherein a width of the second conductive layer is smaller than a width of a part of the first conductive layer, and
wherein an inner edge and an outer edge of the second conductive layer overlap with the first conductive layer.

2. The semiconductor device according to claim 1 ,
wherein the second circuit is one selected from the group consisting of a demodulation circuit, a modulation circuit, a control circuit and a memory.

3. The semiconductor device according to claim 1 ,
wherein the second circuit comprises a transistor.

4. A semiconductor device comprising:
a first conductive layer;
a second conductive layer wirelessly connected to the first conductive layer;
a first circuit for rectifying an alternating-current voltage electrically connected to the second conductive layer;
a regulator circuit electrically connected to the first circuit for rectifying the alternating-current voltage;
a second circuit electrically connected to the regulator circuit; and
a pair of structure bodies,
wherein the second conductive layer, the first circuit for rectifying the alternating-current voltage, the regulator circuit and the second circuit are interposed between the pair of structure bodies,
wherein the first conductive layer and the second conductive layer are configured to be electromagnetically coupled to each other,
wherein the first circuit for rectifying the alternating-current voltage is configured to rectify an alternating-current voltage generated in the second conductive layer, and generate a rectified voltage,
wherein the regulator circuit is configured to adjust a level of the rectified voltage, and generate an adjusted voltage, and
wherein the regulator circuit supplies the adjusted voltage to the second circuit.

5. The semiconductor device according to claim 4 ,
wherein the second circuit is one selected from the group consisting of a demodulation circuit, a modulation circuit, a control circuit and a memory.

6. The semiconductor device according to claim 4 ,
wherein the first conductive layer is loop-shaped,
wherein a part of the second conductive layer is loop-shaped,
wherein a width of the second conductive layer is smaller than a width of a part of the first conductive layer, and
wherein an inner edge and an outer edge of the second conductive layer overlap with the first conductive layer.

7. The semiconductor device according to claim 4 ,
wherein the second circuit comprises a transistor.

8. The semiconductor device according to claim 4 ,
wherein each of the pair of structure bodies is formed by impregnating a fiber body with a resin.

9. The semiconductor device according to claim 4 ,
wherein the pair of structure bodies has an insulating property.

10. The semiconductor device according to claim 4 , further comprising:
a first antistatic film on at least one surface of one of the pair of structure bodies; and
a second antistatic film on at least one surface of the other of the pair of structure bodies.

11. A semiconductor device comprising:
a first conductive layer;
a second conductive layer wirelessly connected to the first conductive layer;
a first circuit for rectifying an alternating-current voltage electrically connected to the second conductive layer;
a regulator circuit electrically connected to the first circuit for rectifying the alternating-current voltage; and
a second circuit electrically connected to the regulator circuit,
wherein the first conductive layer and the second conductive layer are configured to be electromagnetically coupled to each other,
wherein the first circuit for rectifying the alternating-current voltage is configured to rectify an alternating-current voltage generated in the second conductive layer, and generate a rectified voltage,
wherein the regulator circuit is configured to adjust a level of the rectified voltage, and generate an adjusted voltage,
wherein the regulator circuit supplies the adjusted voltage to the second circuit,
wherein when alternating current flows through the first conductive layer, induced electromotive force is generated by electromagnetic induction in the second conductive layer,
wherein the first conductive layer is loop-shaped,
wherein a part of the second conductive layer is loop-shaped,
wherein a width of the second conductive layer is smaller than a width of a part of the first conductive layer, and
wherein an inner edge and an outer edge of the second conductive layer overlap with the first conductive layer.

12. The semiconductor device according to claim 11 ,
wherein the second circuit is one selected from the group consisting of a demodulation circuit, a modulation circuit, a control circuit and a memory.

13. The semiconductor device according to claim 11 ,
wherein the second circuit comprises a transistor.

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei
• Koyama Jun
• Kato Kiyoshi
• Koen Takaaki
• Yakubo Yuto
• Yanagisawa Makoto
• Ohtani Hisashi
• Sugiyama Eiji
• Horikoshi Nozomi

Classifications

• H10W74/473 Primary

  containing a filler · CPC title

• H10W74/131

  the semiconductor body being only partially enclosed · CPC title

• H01L23/3157

  Electricity · mapped topic

• G06K19/07794

  the record carrier comprising a booster or auxiliary antenna in addition to the antenna connected directly to the integrated circuit · CPC title

• H01L2924/0002

  Electricity · mapped topic