Automatic provisioning and onboarding of offline or disconnected machines
US-12182236-B2 · Dec 31, 2024 · US
US9411961B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9411961-B2 |
| Application number | US-91737010-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 1, 2010 |
| Priority date | May 24, 2006 |
| Publication date | Aug 9, 2016 |
| Grant date | Aug 9, 2016 |
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Disclosed are methods, apparatus and systems, including computer program products, implementing and using techniques for authenticating data for playing a game of chance on a gaming machine. A motherboard is provided in the gaming machine. A peripheral component is in communication with the motherboard over a bus. The peripheral component has access to authentication code in a memory. An authentication instruction message is received over the bus. Responsive to receiving the authentication instruction message, the authentication code is executed on a processor to perform an authentication process on the data. A signal is output, indicating whether the authentication process is successful in authenticating the data. In one implementation, the signal enables play of the game of chance on the gaming machine when the authentication process is successful, and disables play of the game of chance when the authentication process is unsuccessful.
Opening claim text (preview).
What is claimed is: 1. A wager-based gaming machine to provide a game of chance, the wager-based gaming machine comprising: a video display device to display the game of chance; a value input device to receive a wager for play of the game of chance; a value output device that outputs an award, wherein the award is based on play of the game of chance; a motherboard having a basic input-output system (BIOS); a storage device in communication with the motherboard, the storage device including data stored therein for providing the game of chance; a peripheral component in communication with the motherboard over a bus, and the peripheral component removably coupled with the bus; the peripheral component is a passive device; the peripheral component includes a processor; the peripheral component contains memory having an authentication code stored therein; a decoder situated between the bus and the peripheral component, wherein the decoder decodes information passed between the peripheral component and the bus; the peripheral component containing instructions stored in the memory of the peripheral component, which when executed by the processor of the peripheral component, causes the processor of the peripheral component to perform the steps of: receiving data provided by the game of chance; receiving an authentication instruction from the BIOS over the bus; executing the authentication code; and verifying the authenticity of the received data provided by the game of chance. 2. The wager-based gaming machine recited in claim 1 , wherein the processor is located on the motherboard. 3. The wager-based gaming machine recited in claim 1 , wherein the peripheral component is situated on the motherboard. 4. The wager-based gaming machine recited in claim 1 , wherein the peripheral component is situated off of the motherboard. 5. The wager-based gaming machine recited in claim 1 , wherein the peripheral component is situated on a card. 6. The wager-based gaming machine recited in claim 1 , wherein the bus is a serial bus. 7. The wager-based gaming machine recited in claim 1 , wherein at least a portion of the bus is situated within the gaming machine. 8. The wager-based gaming machine recited in claim 1 , wherein at least a portion of the bus is situated outside of the gaming machine. 9. The wager-based gaming machine recited in claim 1 , wherein the storage device is located external to the peripheral component. 10. The wager-based gaming machine recited in claim 1 , wherein the gaming machine is a state-based gaming machine which maintains gaming machine state information in a non-volatile memory, the gaming machine state information including award information related to outputting the award responsive to play of the game of chance. 11. The wager-based gaming machine recited in claim 1 , wherein the storage device includes non-volatile memory. 12. The wager-based gaming machine recited in claim 1 , wherein the data includes instructions for generating the game of chance. 13. The wager-based gaming machine of claim 1 , wherein the bus is a universal serial bus.
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