Method and apparatus for correlation canceller for interference mitigation with adaptive DC offset cancellation

Patent metadata

Field	Value
Publication number	US-9407477-B2
Application number	US-201414539490-A
Country	US
Kind code	B2
Filing date	Nov 12, 2014
Priority date	Nov 12, 2014
Publication date	Aug 2, 2016
Grant date	Aug 2, 2016

Abstract

A method and apparatus for a method and apparatus for correlation canceller for interference mitigation with adaptive DC offset cancellation for a dual mode communication device includes detecting an active signal transmitting in one mode; configuring integrators associated with the adaptive correlation canceller into gain amplifiers; detecting DC offset utilizing the gain amplifiers and comparators; and configuring the integrators from the gain amplifiers back to integrators with the DC offset applied thereto. The active signal transmitting in one mode can be Long Term Evolution (LTE) which is adjacent to a signal in another mode.

First claim

We claim:

1. A method for direct current (DC) offset correction in an adaptive correlation canceller for a dual mode communication device, the method comprising:
detecting an active signal transmitting in one mode;
configuring integrators associated with the adaptive correlation canceller into gain amplifiers;
detecting DC offset utilizing the gain amplifiers and comparators; and
configuring the integrators from the gain amplifiers back to integrators with the DC offset applied thereto; and
wherein the adaptive correlation canceller estimates phase and amplitude of the active signal to subtract from a signal received in another mode which is adjacent to the active signal.

2. The method of claim 1 , wherein the active signal transmitting in one mode is Long Term Evolution which is adjacent to a signal in another mode.

3. The method of claim 1 , wherein the DC offset is detected and corrected for multipliers and the integrators using a common OpAmp.

4. The method of claim 1 , wherein the detecting the active signal is based on sampling a Long Term Evolution (LTE) Radio Frequency Power Amplifier (RFPA) enable signal.

5. A method for direct current (DC) offset correction in an adaptive correlation canceller for a dual mode communication device, the method comprising:
detecting an active signal transmitting in one mode;
configuring integrators associated with the adaptive correlation canceller into gain amplifiers, wherein the integrators are configured into the gain amplifiers through selectively disconnecting the adaptive correlation canceller from a received signal and an output signal generated by the integrators and selectively adjusting circuitry associated with the integrators;
detecting DC offset utilizing the gain amplifiers and comparators;
configuring the integrators from the gain amplifiers back to integrators with the DC offset applied thereto;
receiving a reference signal from the one mode;
receiving a received signal from another mode; and
providing an output signal from the received signal with interference from the one mode removed by the adaptive correlation canceller, with the integrators with the DC offset applied thereto.

6. A method for direct current (DC) offset correction in an adaptive correlation canceller for a dual mode communication device, the method comprising:
detecting an active signal transmitting in one mode;
configuring integrators associated with the adaptive correlation canceller into gain amplifiers, wherein the gain amplifiers are configured in a low gain stage for coarse DC offset detection and a high gain stage for fine DC offset detection;
wherein the integrators are configured into the gain amplifiers through selectively disconnecting the adaptive correlation canceller from a received signal and an output signal generated by the integrators;
detecting DC offset utilizing the gain amplifiers and comparators; and
configuring the integrators from the gain amplifiers back to integrators with the DC offset applied thereto.

7. The method of claim 6 , wherein the DC offset is detected using a Successive Approximation Register (SAR) algorithm.

8. A correlation canceller circuit with adaptive direct current (DC) offset correction for a dual mode communication device, the correlation canceller circuit comprising:
an integrator section coupled to a reference signal from a first mode;
a weighter section coupled to the integrator section and a summer coupled to a received signal from a second mode;
wherein the integrator section is configured to selectively operate as integrators for adaptive correlation canceller and as gain amplifiers for detecting DC offsets in the adaptive correlation canceller, when the reference signal is active from the first mode; and
wherein the adaptive correlation canceller estimates phase and amplitude of signals from the first mode to subtract from the received signal from the second mode, the received signal being adjacent from the signals from the first mode.

9. The correlation canceller circuit of claim 8 , wherein the reference signal from the first mode is Long Term Evolution which is adjacent to the received signal in the second mode.

10. The correlation canceller circuit of claim 8 , wherein the DC offset is detected using a Successive Approximation Register (SAR) algorithm.

11. The correlation canceller circuit of claim 8 , wherein the DC offset is detected and corrected for multipliers and the integrators using a common OpAmp.

12. The correlation canceller circuit of claim 8 , wherein the reference signal is detected as active based on sampling a Long Term Evolution (LTE) Radio Frequency Power Amplifier (RFPA) enable signal.

13. A correlation canceller circuit with adaptive direct current (DC) offset correction for a dual mode communication device, the correlation canceller circuit comprising:
an integrator section coupled to a reference signal from a first mode;
a weighter section coupled to the integrator section and a summer coupled to a received signal from a second mode; and
wherein the integrator section is configured to selectively operate as integrators for adaptive correlation canceller and as gain amplifiers for detecting DC offsets in the adaptive correlation canceller, when the reference signal is active from the first mode; and
wherein integrators associated with the integrator section are configured into the gain amplifiers through selectively disconnecting the weighter section from the summer and disconnecting the correlation canceller circuit from a received signal and selectively adjusting circuitry associated with the integrators.

14. A correlation canceller circuit with adaptive direct current (DC) offset correction for a dual mode communication device, the correlation canceller circuit comprising:
an integrator section coupled to a reference signal from a first mode;
a weighter section coupled to the integrator section and a summer coupled to a received signal from a second mode; and
wherein the integrator section is configured to selectively operate as integrators for adaptive correlation canceller and as gain amplifiers for detecting DC offsets in the adaptive correlation canceller by selectively disconnecting the weighter section from the summer and by disconnecting the correlation canceller circuit from a received signal, when the reference signal is active from the first mode; and
wherein the gain amplifiers are configured in a low gain stage for coarse DC offset detection and a high gain stage for fine DC offset detection.

15. A dual mode communication device, wherein one mode is transmitting in an adjacent band as another mode is receiving, the dual mode communication device comprising:
a transmitter for a first mode;
a receiver for a second mode which is substantially adjacent in spectrum to the first mode, wherein the first mode is Long Term Evolution and the second mode is narrowband Public Safety; and
an adaptive correlation canceller circuit coupled to the transmitter and the receiver and configured to estimate phase and amplitude of signals from the first mode to subtract from a received signal from the second mode, wherein the adaptive correlation canceller circuit comprises an integrator section coupled to a reference signal from the first mode and a weighter section coupled to the integrator section and a summer coupled to the received signal from the second mode;
wherein the integrator section is configured to selectively operate as integrators for adaptive correlation canceller and as gain amplifiers for detecting direct current (DC) offsets in the adaptive correlation canceller, w

Assignees

• Motorola Solutions Inc
• Motorola Solutions Inc

Inventors

• Rozental Mark
• Corse Nir
• Doberstein Kevin G
• Dorevitch Josh E
• Hason Baruh
• Tordjman Claudine

Classifications

• H04L25/061 Primary

  providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of DC offset (removal of DC offset in coupling arrangements H04L25/029, H04L25/0296) · CPC title

• H04B1/10

  Means associated with receiver for limiting or suppressing noise or interference · CPC title

• H04B1/30

  for homodyne or synchrodyne receivers (demodulator circuits H03D1/22) · CPC title

• H04B2001/305

  using DC offset compensation techniques · CPC title