Devices and methods for power consumption control in powerline communications systems and apparatus

US9407323B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9407323-B2
Application numberUS-201414154023-A
CountryUS
Kind codeB2
Filing dateJan 13, 2014
Priority dateJan 18, 2013
Publication dateAug 2, 2016
Grant dateAug 2, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure includes systems and techniques relating to power line communications (PLC) systems and apparatus. In some implementations, a method includes determining information regarding a potential data rate to be used with a powerline communications (PLC) channel, reducing a bias current or voltage of an analog front end of a PLC transceiver based on the determined information to reduce power consumption of the analog front end of the PLC transceiver, and transmitting or receiving data over the PLC channel with the reduced bias current or voltage of the analog front end of the PLC transceiver.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: determining information regarding a potential data rate to be used with a powerline communications (PLC) channel; reducing a bias current or voltage of an analog front end of a PLC transceiver based on the determined information to reduce power consumption of the analog front end of the PLC transceiver; and transmitting or receiving data over the PLC channel with the reduced bias current or voltage of the analog front end of the PLC transceiver. 2. The method of claim 1 , comprising: determining additional information regarding a new potential data rate to be used with the PLC channel; boosting the bias current or voltage of the analog front end of the PLC transceiver based on the additional information to increase power consumption of the analog front end of the PLC transceiver; and transmitting or receiving data over the PLC channel with the boosted bias current or voltage of the analog front end of the PLC transceiver. 3. The method of claim 1 , wherein determining the information regarding the potential data rate comprises: determining a channel condition of the PLC channel; and determining a data rate required by an application or a network. 4. The method of claim 1 , wherein determining the information regarding the potential data rate comprises determining a channel condition of the PLC channel based on received information regarding a transmitter output power. 5. The method of claim 1 , wherein determining the information regarding the potential data rate comprises determining a channel condition of the PLC channel based on received information regarding impedance matching with the powerline. 6. The method of claim 1 , comprising setting the power consumption of the analog front end such that noise and distortion caused by the analog front end are adapted to noise from the PLC channel. 7. The method of claim 6 , comprising computing the noise from the PLC channel as a function of a measured signal to noise ratio (SNR). 8. The method of claim 6 , comprising computing the noise from the PLC channel as a function of tonemap and coding rate. 9. The method of claim 1 , comprising setting the power consumption of the analog front end such that noise and distortion caused by the analog front end are adapted to a target noise required to reach a given data rate. 10. The method of claim 9 , comprising determining the given data rate from a link data rate required by an application. 11. A system comprising: a power line; and a transceiver comprising an analog front end coupled with the power line; wherein the transceiver is configured to determine information regarding a potential data rate to be used with powerline communications (PLC) over the power line, reduce a bias current or voltage of the analog front end based on the determined information to reduce power consumption of the analog front end, and transmit or receive data over the power line with the reduced bias current or voltage of the analog front end. 12. The system of claim 11 , wherein the transceiver is configured to determine additional information regarding a new potential data rate to be used, boost the bias current or voltage of the analog front end based on the additional information to increase power consumption of the analog front end, and transmit or receive data over the power line with the boosted bias current or voltage of the analog front end. 13. The system of claim 11 , wherein the transceiver is configured to determine the information regarding the potential data rate by determining a PLC channel condition, and determining a data rate required by an application or a network. 14. The system of claim 11 , wherein the transceiver is configured to determine the information regarding the potential data rate by determining a PLC channel condition based on received information regarding a transmitter output power. 15. The system of claim 11 , wherein the transceiver is configured to determine the information regarding the potential data rate by determining a PLC channel condition based on received information regarding impedance matching with the power line. 16. The system of claim 11 , wherein the transceiver is configured to set the power consumption of the analog front end such that noise and distortion caused by the analog front end are adapted to noise from the PLC over the power line. 17. The system of claim 16 , wherein the transceiver is configured to compute the noise from the PLC over the power line as a function of a measured signal to noise ratio (SNR). 18. The system of claim 16 , wherein the transceiver is configured to compute the noise from the PLC over the power line as a function of tonemap and coding rate. 19. The system of claim 11 , wherein the transceiver is configured to set the power consumption of the analog front end such that noise and distortion caused by the analog front end are adapted to a target noise required to reach a given data rate. 20. The system of claim 19 , wherein the transceiver is configured to determine the given data rate from a link data rate required by an application.

Assignees

Inventors

Classifications

  • improving S/N by matching impedance, noise reduction, gain control · CPC title

  • H04B3/54Primary

    Systems for transmission via power distribution lines · CPC title

  • using coupling circuits · CPC title

  • the information being in digital form · CPC title

  • Circuits for coupling, blocking, or by-passing of signals · CPC title

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What does patent US9407323B2 cover?
The present disclosure includes systems and techniques relating to power line communications (PLC) systems and apparatus. In some implementations, a method includes determining information regarding a potential data rate to be used with a powerline communications (PLC) channel, reducing a bias current or voltage of an analog front end of a PLC transceiver based on the determined information to …
Who is the assignee on this patent?
Marvell World Trade Ltd
What technology area does this patent fall under?
Primary CPC classification H04B3/54. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 02 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).