Harmonic time domain interleave to extend arbitrary waveform generator bandwidth and sample rate

Patent metadata

Field	Value
Publication number	US-9407280-B1
Application number	US-201514696857-A
Country	US
Kind code	B1
Filing date	Apr 27, 2015
Priority date	Apr 27, 2015
Publication date	Aug 2, 2016
Grant date	Aug 2, 2016

Abstract

A harmonic time interleave (HTI) system, including a reference signal, a first summing component to produce a summed reference signal, a de-interleave block to receive an input signal and output a plurality of de-interleaved input signals, a plurality of digital-to-analog converters, each digital-to-analog converter configured to receive a corresponding one of a plurality of de-interleaved input signals and to output a corresponding analog signal, a plurality of mixing components, each mixing component configured to receive the summed reference signal and an analog signal from a corresponding of the plurality of digital-to-analog converters, and to output a corresponding mixed signal, and a second summing component configured to receive the mixed signal from each of the corresponding mixing components and to produce a substantially full-bandwidth analog signal representation of the input signal.

First claim

The invention claimed is:

1. A harmonic time interleave (HTI) system, comprising:
a sample clock configured to provide a reference signal;
a first summing component configured to receive the reference signal at a first input, to receive a second signal at a second input, and to produce a summed reference signal;
a de-interleave block configured to receive an input signal and output a plurality of de-interleaved input signals;
a plurality of digital-to-analog converters, each digital-to-analog converter configured to receive a corresponding one of a plurality of de-interleaved input signals and to output a corresponding analog signal;
a plurality of mixing components, each mixing component configured to receive the summed reference signal and an analog signal from a corresponding one of the plurality of digital-to-analog converters, and to output a corresponding mixed signal; and
a second summing component configured to receive the mixed signal from each of the corresponding mixing components and to produce a substantially full-bandwidth analog signal representation of the input signal.

2. The HTI system of claim 1 , further comprising a bandwidth enhance filter configured to correct the phase and magnitude of the input signal prior to the input signal being received at the de-interleave block.

3. The HTI system of claim 1 , further comprising a frequency multiplier configured to receive the reference signal and produce the second signal.

4. The HTI system of claim 1 , wherein the first summing component is configured to receive a harmonic to produce the summed reference signal, the system further comprising:
a frequency multiplier configured to receive the reference signal and produce a harmonic signal; and
a delay configured to receive the harmonic signal and output the second signal,
wherein the reference signal is a cosine wave with a frequency equal to the sample rate for the digital-to-analog converters, and the second signal is a dc value corresponding to a factor substantially 1.0.

5. The HTI system of claim 1 , wherein the first summing component is configured to receive a plurality of delayed harmonic signals to produce the summed reference signal, and the system further comprises:
a plurality of frequency multipliers configured to receive the reference signal and produce a plurality of harmonic signals; and
a plurality of delays, each delay corresponding to a frequency multiplier and configured to receive the harmonic signal and output the plurality of delayed harmonic signals,
wherein the reference signal is a cosine wave with a frequency equal to the sample rate for the digital-to-analog converters, and the second signal is a do value corresponding to a factor substantially 1.0.

6. The HTI system of claim 5 , wherein each of the plurality of delays is configured to minimize peaks in the summed reference signal.

7. The HTI system of claim 1 , wherein the reference signal is a cosine wave with a frequency equal to the sample rate for the digital-to-analog converters and the second signal is a dc value corresponding to a factor substantially 1.0.

8. The HTI system of claim 7 , wherein the plurality of de-interleaved signals includes four signals, the plurality of digital-to-analog converters includes four digital-to-analog converters, and the plurality of mixing components includes four mixing components.

9. The HTI system of claim 8 , wherein the first summing component is configured to receive a third signal, and the system further comprises a frequency multiplier configured to receive the reference signal from the sample clock and output third signal.

10. The HTI system of claim 1 , further comprising a plurality of delay blocks, each delay block configured to receive the corresponding mixed signal and output a delayed mixed signal to the second summing component.

11. The HTI system of claim 10 , wherein a first of the plurality of delay blocks has a delay of T, and the remaining delayed blocks have a delay of T(M−1)/M, where M is the number of de-interleave paths and T is the sample interval.

12. The HTI system of claim 1 , wherein the HTI system is housed within an arbitrary waveform generator.

13. The HTI system of claim 1 , further includes a low pass filter configured to filter the substantially full-bandwidth analog signal representation of the input signal.

14. A harmonic time interleave method, comprising:
receiving an input signal at a de-interleave block;
separating the input signal into a plurality of de-interleaved input signals by the de-interleave block;
converting each of the plurality of de-interleaved input signal to a corresponding analog signal;
summing a sample clock signal and a second signal to produce a reference signal
mixing each corresponding analog signal with the reference signal in a corresponding mixing component of a plurality of mixing components; and
summing each of the mixed analog signals to produce a full-bandwidth analog signal representation of the input signal.

15. The harmonic time interleave method of claim 14 , wherein the second signal is a dc value corresponding to a factor substantially 1.0.

16. The harmonic time interleave method of claim 14 , further comprising delaying each of the mixed analog signal prior to summing the mixing analog signals.

Assignees

• Tektronix Inc

Inventors

• Pickerd John J

Classifications

• H03M1/1215 Primary

  using time-division multiplexing · CPC title

• H03M1/08

  of noise {(H03M1/0617 takes precedence)} · CPC title

• H03M1/662 Primary

  Multiplexed conversion systems · CPC title

• G01R13/0272

  for sampling · CPC title

• G01R13/0218

  Circuits therefor · CPC title