Glitchless clock switching that handles stopped clocks
US-9207704-B2 · Dec 8, 2015 · US
US9407246B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9407246-B2 |
| Application number | US-201514716518-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 19, 2015 |
| Priority date | May 19, 2015 |
| Publication date | Aug 2, 2016 |
| Grant date | Aug 2, 2016 |
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A phase modulation (PM) noise reducer includes: an amplitude modulation (AM) detector to receive a primary oscillator signal and to produce an AM detector signal, the primary oscillator signal including a first PM noise; and a control circuit to receive the AM detector signal, to produce a control signal, and to communicate the control signal to a phase shifter, wherein the phase shifter receives the primary oscillator signal and control signal, and the oscillator produces a secondary oscillator signal that includes a second PM noise that is less than the first PM noise, and further including; a PM detector and power splitter receives the primary oscillator signal, splits a power of the primary oscillator signal, and communicates the primary oscillator signal to the AM detector and PM detector.
Opening claim text (preview).
What is claimed is: 1. A phase modulation (PM) noise reducer to reduce phase modulation noise of an oscillator, the PM noise reducer comprising: an amplitude modulation (AM) detector to receive a primary oscillator signal from the oscillator and to produce an AM detector signal based on the primary oscillator signal, the primary oscillator signal comprising a first phase modulation (PM) noise; a control circuit in electrical communication with the AM detector to receive the AM detector signal, to produce a control signal, and to communicate the control signal to a phase shifter disposed in the oscillator; a phase modulation (PM) detector; and a power splitter in electrical communication with the AM detector and the PM detector, the power splitter being configured: to receive the primary oscillator signal prior to the AM detector and the PM detector; to split a power of the primary oscillator signal; and to communicate the primary oscillator signal to the AM detector and to the PM detector, wherein the phase shifter is configured to receive the primary oscillator signal and the control signal, and the oscillator is configured to produce a secondary oscillator signal in response to the phase shifter receiving the control signal from the control circuit, the secondary oscillator comprising a second PM noise that is less than the first PM noise. 2. The PM noise reducer of claim 1 , wherein the AM detector comprises: a diode in electrical communication with the power splitter to receive the primary oscillator signal from the power splitter; and a capacitor in electrical communication with the diode to provide the AM detector signal to the control circuit. 3. The PM noise reducer of claim 2 , wherein the AM detector further comprises an amplifier in electrical communication with the capacitor and interposed between the capacitor and the control circuit to amplify the AM detector signal. 4. The PM noise reducer of claim 3 , wherein the PM detector is configured to receive the primary oscillator signal from the power splitter, to produce a PM detector signal in response to receiving the primary oscillator signal, and to communicate the PM detector signal to the control circuit. 5. The PM noise reducer of claim 4 , wherein the PM detector comprises: a local oscillator to produce a local oscillator signal; a demodulator to receive the primary oscillator signal and the local oscillator signal and to produce a demodulator signal; and a sampler to receive the demodulator signal from the demodulator and to produce the PM detector signal. 6. The PM noise reducer of claim 5 , wherein the control circuit comprises: an analog-to-digital converter to receive the AM detector signal and the PM detector signal; a field programmable gate array in electrical communication with the analog-to-digital converter comprising a digital filter; and a digital to analog converter in electrical communication with the field programmable gate array to communicate the control signal to the phase shifter. 7. The PM noise reducer of claim 6 , wherein the control circuit is configured to: produce an AM detector transfer function that is a result of a ratio of the AM detector signal to the PM detector signal; produce a phase shifter transfer function; and produce the control signal comprising a conjugate filter that is a result of a ratio of the AM detector transfer function and the phase shifter transfer function. 8. The PM noise reducer of claim 5 , wherein the control circuit comprises an analog filter to receive the AM detector signal and the PM detector signal and to communicate the control signal to the phase shifter. 9. The PM noise reducer of claim 8 , wherein the control circuit is configured to: produce an AM detector transfer function that is a result of a ratio of the AM detector signal to the PM detector signal; produce a phase shifter transfer function; and produce the control signal comprising a conjugate filter that is a result of a ratio of the AM detector transfer function and the phase shifter transfer function.
Amplitude modulation and angle modulation produced simultaneously or at will by the same modulating signal (H03C7/00 takes precedence) · CPC title
Modifications of modulator to reduce distortion, e.g. by feedback, and clearly applicable to more than one type of modulator · CPC title
Reduction of phase noise · CPC title
Details · CPC title
Suppression or limitation of noise or interference (specially adapted for transmission systems H04B15/00, H04L25/08) · CPC title
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