Buffer layers for photovoltaic devices with group V doping
US-12119416-B2 · Oct 15, 2024 · US
US9406829B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9406829-B2 |
| Application number | US-201414317479-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 27, 2014 |
| Priority date | Jun 28, 2013 |
| Publication date | Aug 2, 2016 |
| Grant date | Aug 2, 2016 |
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A method to improve operation of a CdTe-based photovoltaic device is disclosed, the method comprising the steps of depositing a semiconductor absorber layer adjacent to a substrate, depositing a semiconductor buffer layer adjacent to the semiconductor layer, and annealing at least one of the semiconductor absorber layer and the semiconductor buffer layer with one of a laser and a flash lamp.
Opening claim text (preview).
What is claimed is: 1. A method of manufacturing a photovoltaic device comprising the steps of: providing a multilayer construct, the multilayer construct comprising a substrate having a thin-conductive oxide layer deposited thereon, a semiconductor absorber layer, and at least one semiconductor contact buffer layer; and annealing the semiconductor absorber layer or the semiconductor contact buffer layer with a laser or a flash lamp to form an alloy. 2. The method of claim 1 , wherein the annealing forms an alloy in the semiconductor absorber layer. 3. The method of claim 1 , wherein the annealing forms an alloy between the semiconductor absorber layer and the semiconductor contact buffer layer. 4. The method of claim 1 , wherein the annealing is performed with a UV flash lamp or a pulse UV laser. 5. The method of claim 1 , wherein the annealing is performed in an inert gas environment. 6. The method of claim 1 , wherein the at least one semiconductor contact buffer layer comprises a semiconductor front contact buffer layer disposed between the substrate and the semiconductor absorber layer. 7. The method of claim 1 , wherein the at least one semiconductor contact buffer layer comprises a semiconductor back contact buffer layer and the semiconductor absorber layer is disposed between the substrate and the semiconductor back contact buffer layer. 8. The method of claim 1 , wherein the at least one semiconductor contact buffer layer comprises a semiconductor front contact buffer layer and a semiconductor back contact buffer layer, the semiconductor front contact buffer layer disposed between the substrate and the semiconductor absorber layer, and the semiconductor absorber layer disposed between the substrate and the semiconductor back contact buffer layer. 9. The method of claim 8 , wherein the semiconductor absorber layer comprises CdTe, the semiconductor front contact buffer layer comprises CdS, and the semiconductor back contact buffer layer comprises CdS. 10. The method of claim 1 , wherein the semiconductor absorber layer comprises CdTe and the at least one semiconductor contact buffer layer comprises CdS and the annealing forms an alloy layer of CdS x Te 1-x between the semiconductor absorber layer and the at least one semiconductor contact buffer layer. 11. The method of claim 10 , wherein the at least one semiconductor contact buffer layer comprises a semiconductor front contact buffer layer disposed between the substrate and the semiconductor absorber layer, and the annealing forms the alloy layer of CdS x Te 1-x in place of substantially all of the semiconductor front contact buffer layer. 12. The method of claim 1 , wherein the semiconductor absorber layer comprises CdTe and the at least one semiconductor contact buffer layer comprises ZnTe and the annealing forms an alloy layer of Cd 1-x Zn x Te between the semiconductor absorber layer and the at least one semiconductor contact buffer layer. 13. The method of claim 12 , wherein the at least one semiconductor contact buffer layer comprises a semiconductor back contact buffer layer, the semiconductor absorber layer disposed between the substrate and the semiconductor back contact buffer layer, and the annealing forms the alloy layer of Cd 1-x Zn x Te in place of substantially all of the semiconductor back contact buffer layer. 14. The method of claim 1 , wherein the semiconductor absorber layer comprises CdTe and the at least one semiconductor contact buffer layer comprises MnTe and the annealing forms an alloy layer of Cd 1-x Mn x Te between the semiconductor absorber layer and the at least one semiconductor contact buffer layer. 15. The method of claim 14 , wherein the at least one semiconductor contact buffer layer comprises a semiconductor back contact buffer layer, the semiconductor absorber layer disposed between the substrate and the semiconductor back contact buffer layer, and the annealing forms the alloy layer of Cd 1-x Mn x Te in place of substantially all of the semiconductor back contact buffer layer. 16. The method of claim 1 , wherein the semiconductor absorber layer comprises CdTe and the at least one semiconductor contact buffer layer comprises CdSe and the annealing forms an alloy layer of CdSe x Te 1-x between the semiconductor absorber layer and the at least one semiconductor contact buffer layer. 17. The method of claim 16 , wherein the at least one semiconductor contact buffer layer comprises a semiconductor back contact buffer layer, the semiconductor absorber layer disposed between the substrate and the semiconductor back contact buffer layer, and the annealing forms the alloy layer of CdSe x Te 1-x in place of substantially all of the semiconductor back contact buffer layer. 18. The method of claim 1 , wherein the semiconductor absorber layer comprises CdTe and the at least one semiconductor contact buffer layer comprises MgTe and the annealing forms an alloy layer of Cd 1-x Mg x Te between the semiconductor absorber layer and the at least one semiconductor contact buffer layer. 19. The method of claim 18 , wherein the at least one semiconductor contact buffer layer comprises a semiconductor back contact buffer layer, the semiconductor absorber layer disposed between the substrate and the semiconductor back contact buffer layer, and the annealing forms the alloy layer of Cd 1-x Mg x Te in place of substantially all of the semiconductor back contact buffer layer. 20. The method of claim 1 , wherein the semiconductor absorber layer comprises CdTe and the at least one semiconductor contact buffer layer comprises HgTe and the annealing forms an alloy layer of Cd 1-x Hg x Te between the semiconductor absorber layer and the at least one semiconductor contact buffer layer. 21. The method of claim 20 , wherein the at least one semiconductor contact buffer layer comprises a semiconductor back contact buffer layer, the semiconductor absorber layer disposed between the substrate and the semiconductor back contact buffer layer, and the annealing forms the alloy layer of Cd 1-x Hg x Te in place of substantially all of the semiconductor back contact buffer layer. 22. The method of claim 1 , wherein the semiconductor absorber layer comprises CdTe and CdS. 23. The method of claim 1 , wherein the thin-conductive oxide layer comprises SnO2:F. 24. The method of claim 1 , wherein the annealing includes introducing the laser or the flash lamp to the semiconductor absorber layer or the semiconductor contact buffer layer from a side opposite the substrate. 25. The method of claim 1 , wherein the annealing includes controlling a depth of penetration of the energy of the laser or the flash lamp so that the energy does not contact other layers of the photovoltaic device. 26. A method of manufacturing a photovoltaic device comprising the steps of: providing a multilayer construct, the multilayer construct comprising a substrate having a thin-conductive oxide layer deposited thereon, a semiconductor absorber layer including CdTe, and a semiconductor front contact buffer layer including ZnTe, MnTe, MgTe, HgTe, or CdSe, the semiconductor front contact buffer layer disposed between the substrate and the semiconductor absorber layer; and annealing the semiconductor absorber layer or the semiconductor contact buffer layer with a laser or a flash lamp to form an alloy including Cd 1-x Zn x Te, Cd 1-x Mn x Te, Cd 1-x Mg x Te, Cd 1-x Hg x Te, or CdSe x Te 1-x .
Annealing · CPC title
The active layers comprising only Group II-VI materials, e.g. CdS, ZnS or CdTe · CPC title
comprising only Group II-VI materials, e.g. CdS/CdTe photovoltaic cells · CPC title
Electricity · mapped topic
Electricity · mapped topic
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