Semiconductor device and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-9406761-B2
Application number	US-201414479646-A
Country	US
Kind code	B2
Filing date	Sep 8, 2014
Priority date	Sep 13, 2013
Publication date	Aug 2, 2016
Grant date	Aug 2, 2016

Abstract

A transistor having high field-effect mobility is provided. A transistor having stable electrical characteristics is provided. A transistor having low off-state current (current in an off state) is provided. Alternatively, a semiconductor device including the transistor is provided. The semiconductor device includes a first insulating film, an oxide semiconductor film over the first insulating film, a second insulating film over the oxide semiconductor film, and a conductive film overlapping with the oxide semiconductor film with the first insulating film or the second insulating film provided between the oxide semiconductor film and the conductive film. The composition of the oxide semiconductor film changes continuously between the first insulating film and the second insulating film.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a first insulating film;
an oxide semiconductor film over the first insulating film;
a second insulating film over the oxide semiconductor film; and
a conductive film,
wherein the first insulating film or the second insulating film is between the oxide semiconductor film and the conductive film,
wherein the oxide semiconductor film contains indium, an element M, and zinc, and
wherein the oxide semiconductor film has an element M concentration gradient that increases toward the first insulating film and an element M concentration gradient that increases toward the second insulating film.

2. The semiconductor device according to claim 1 ,
wherein the element M is aluminum, gallium, yttrium, or tin.

3. The semiconductor device according to claim 1 , wherein the oxide semiconductor film includes a zinc oxide layer being in contact with the first insulating film and having a thickness of 0.1 atomic layers or more and 20 atomic layers or less.

4. A semiconductor device comprising:
a first insulating film;
an oxide semiconductor film over the first insulating film;
a second insulating film over the oxide semiconductor film; and
a conductive film,
wherein the first insulating film or the second insulating film is between the oxide semiconductor film and the conductive film, and
wherein the oxide semiconductor film has a concentration gradient so that the electron affinity decreases toward the first insulating film and a concentration gradient so that the electron affinity decreases toward the second insulating film.

5. A method for manufacturing a semiconductor device comprising the steps of:
forming a first insulating film;
forming an oxide semiconductor film over the first insulating film;
forming a second insulating film over the oxide semiconductor film; and
forming a conductive film,
wherein the first insulating film or the second insulating film is formed between the oxide semiconductor film and the conductive film,
wherein the step of forming the oxide semiconductor film is performed by a thermal chemical vapor deposition method while a flow rate ratio of source gases is changed,
wherein a gas containing indium, a gas containing an element M, and a gas containing zinc are used as the source gases,
wherein a proportion of the gas containing the element M in the source gases is decreased as film formation proceeds, and
wherein the proportion of the gas containing the element M is increased as film formation comes to end.

6. The method for manufacturing the semiconductor device, according to claim 5 ,
wherein the element M is aluminum, gallium, yttrium, or tin.

7. A method for manufacturing a semiconductor device comprising the steps of:
forming a first insulating film;
forming an oxide semiconductor film over the first insulating film;
forming a second insulating film over the oxide semiconductor film; and
forming a conductive film,
wherein the first insulating film or the second insulating film is formed between the oxide semiconductor film and the conductive film,
wherein the step of forming the oxide semiconductor film is performed in a first step and a second step after the first step,
wherein the first step comprises depositing a zinc oxide layer having a thickness of 0.1 atomic layers or more and 20 atomic layers or less using a gas containing zinc by a thermal chemical vapor deposition method,
wherein the second step comprises depositing a semiconductor film containing indium, an element M, and zinc by a thermal chemical vapor deposition method while flow rate ratio of a gas containing indium, a gas containing the element M, and a gas containing zinc is changed,
wherein the element M is aluminum, gallium, yttrium, or tin,
wherein a proportion of the gas containing the element M in the source gases is decreased as film formation proceeds, and
wherein the proportion of the gas containing the element M is increased as film formation comes to end.

8. The method for manufacturing the semiconductor device, according to claim 7 , wherein the semiconductor film containing indium, the element M, and zinc is deposited while the zinc oxide layer is grown as a seed crystal.

9. The method for manufacturing the semiconductor device, according to claim 7 , wherein the zinc oxide layer and the semiconductor film are successively deposited without exposure to the air.

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei

Classifications

• H10D30/6704

  having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device · CPC title

• H10D48/01

  Manufacture or treatment · CPC title

• H10D62/80

  characterised by the materials · CPC title

• H10D30/6757 Primary

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D30/6734

  having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs · CPC title