Flat panel display apparatus and source driver IC

Patent metadata

Field	Value
Publication number	US-9406273-B2
Application number	US-201414472480-A
Country	US
Kind code	B2
Filing date	Aug 29, 2014
Priority date	Aug 30, 2013
Publication date	Aug 2, 2016
Grant date	Aug 2, 2016

Abstract

Disclosed are a flat panel display apparatus and a source driver integrated circuit. The flat panel display apparatus and the source driver integrated circuit supply power to each position in the source driver integrated circuit at a uniform level, so that the output characteristics of a plurality of units using the power are uniform.

First claim

What is claimed is:

1. A flat panel display apparatus comprising:
a source driver integrated circuit including units, which are commonly applied a same power to driving terminals and is arranged at both sides about a center to form an array, a first power pad and a plurality of second power pads for the power formed, nodes formed corresponding to both edges and the center of the array and the plurality of second power pads are connected to have a same line resistance, and including an amplifier having an output terminal connected to the node corresponding to the center of the array; and
a film mounted thereon with the source driver integrated circuit, and formed a first power line connected to the first power pad and second power lines connected to the plurality of second power pads, one end of the second power lines being commonly connected to each other.

2. The flat panel display apparatus according to claim 1 , wherein the amplifier amplifies the power applied to the first power pad.

3. The flat panel display apparatus according to claim 1 , wherein the source driver integrated circuit receives the power from the first power pad and outputs the power routed in the source driver integrated circuit to the plurality of second power pads.

4. The flat panel display apparatus according to claim 1 , wherein a half supply voltage is supplied as the power.

5. The flat panel display apparatus according to claim 4 , wherein the unit includes a channel amplifier that outputs a source driving signal.

6. The flat panel display apparatus according to claim 1 , wherein the second power lines have a same resistance.

7. The flat panel display apparatus according to claim 1 , wherein a printed circuit board is electrically connected to one side of the film, and includes a stabilization capacitor for stabilizing the power of the plurality of second power pads and a third power line for a connection between the commonly connected one end of the second power lines and the stabilization capacitor.

8. A flat panel display apparatus comprising:
a printed circuit board including a stabilization capacitor and providing a first half supply voltage and a second half supply voltage charged in the stabilization capacitor;
a film formed a first power line for routing of the first half supply voltage and a plurality of second power lines for routing of the second half supply voltage; and
a source driver integrated circuit mounted on the film, and formed a first power pad for a connection to the first power line, a plurality of second power pads for a connection to the plurality of second power lines, and including an amplifier that amplifies and outputs the first half supply voltage of the first power pad, units commonly using a second half supply voltage output from the amplifier and arranged at both sides about a center to form an array, and nodes formed corresponding to both edges and the center of the array and the plurality of second power pads are connected to have a same line resistance.

9. The flat panel display apparatus according to claim 8 , wherein the unit includes a channel amplifier that outputs a source driving signal.

10. A source driver integrated circuit comprising:
a first power pad for input of a half supply voltage;
a plurality of second power pads for output of the half supply voltage routed in the source driver integrated circuit;
an amplifier that amplifies and outputs the half supply voltage of the first power pad; and
units commonly using the half supply voltage output from the amplifier and arranged at both sides about a center to form an array,
wherein nodes formed corresponding to both edges and the center of the array are connected to the plurality of second power pads to have a same line resistance, and
wherein an output terminal of the amplifier is connected to the node corresponding to the center of the array.

11. A flat panel display apparatus comprising:
a first power pad for supplying a first half supply voltage;
units formed in an array and arranged in a source driver integrated circuit at both sides about a center of the array;
power lines having first ends commonly connected to each other and supplying a second half supply voltage;
a plurality of second power pads connected to second ends of the power lines, connected to each other by interconnections formed in the source driver integrated circuit, and supplying the second half supply voltage to nodes formed corresponding to both edges and the center of the array; and
a half supply voltage amplifier having an output terminal connected to the plurality second power pads and the node corresponding to the center of the array by the interconnections, amplifying the first half supply voltage supplied from the first power pad, and outputting the second half supply voltage.

12. The flat panel display apparatus according to claim 11 , wherein the power lines have a structure in which the first ends are commonly connected to each other, and the second ends are connected to the plurality second power pads, and the power lines are connected in parallel to each other by the interconnections for connecting the second power pads to each other.

13. The flat panel display apparatus according to claim 11 , further comprising:
a stabilization capacitor connected to the first ends at which the power lines are commonly connected to each other and stabilizing the second half supply voltage.

14. The flat panel display apparatus according to claim 11 , wherein the interconnection is configured such that nodes are formed corresponding to both edges and the center of the array, and the nodes and the plurality second power pads are connected to have a same line resistance.

15. The flat panel display apparatus according to claim 14 , wherein the nodes are connected to driving terminals of the units forming the array.

16. The flat panel display apparatus according to claim 15 , wherein the unit includes a channel amplifier that outputs a source driving signal.

17. The flat panel display apparatus according to claim 2 , wherein a half supply voltage is supplied as the power.

18. The flat panel display apparatus according to claim 3 , wherein a half supply voltage is supplied as the power.

Assignees

• Silicon Works Co Ltd

Inventors

• Kim Young Bok
• Ma Pyung Sik

Classifications

• G09G2330/02

  Details of power systems and of start or stop of display operation · CPC title

• G09G2310/0275

  Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G3/3688 Primary

  suitable for active matrices only · CPC title

• G09G2310/0291

  Details of output amplifiers or buffers arranged for use in a driving circuit · CPC title