Battery module, computer system having the same, and control method of the computer system

US9405352B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9405352-B2
Application numberUS-201313855380-A
CountryUS
Kind codeB2
Filing dateApr 2, 2013
Priority dateJul 30, 2007
Publication dateAug 2, 2016
Grant dateAug 2, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A computer system is provided. The computer system includes a device which operates according to a clock frequency, a battery unit, which comprises a plurality of battery cells, for supplying power to the device, a temperature sensor provided at a location outside of the battery unit for detecting a temperature of the battery cells, a current sensor coupled to the battery unit for detecting a value of a current supplied from the battery unit to the device, and a controller, which is coupled to the temperature sensor and the current sensor, configured to control the clock frequency of the device according to the detected temperature and the detected current value, wherein the controller is configured to decrease the clock frequency if the detected temperature is greater than a first reference value or if the detected current value is greater than a second reference value.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer system, comprising: a device which operates according to a clock frequency; a battery unit, which comprises a plurality of battery cells, for supplying power to the device; a temperature sensor provided at a location outside of the battery unit for detecting a temperature of the battery cells; a current sensor coupled to the battery unit for detecting a value of a current supplied from the battery unit to the device; a comparator configured to compare the detected temperature with a first reference value or the detected current value with a second reference value; and a controller configured to decrease the clock frequency if the detected temperature is greater than the first reference value or if the detected current value is greater than the second reference value, wherein the comparing of the detected temperature with the first reference value comprises converting the detected temperature to a first voltage level, wherein the comparing of the detected current value with the second reference value comprises converting the detected current value to a second voltage level, and wherein the first reference value and the second reference value which are input to the comparator comprise a same reference voltage level. 2. The computer system according to claim 1 , wherein the controller is configured to control the battery unit to stop supplying the power if the temperature detected by the temperature sensor is greater than a third reference value which is greater than the first reference value. 3. The computer system according to claim 1 , wherein the controller is configured to decrease the clock frequency if the detected temperature is maintained for preset time at a temperature greater than the first reference value. 4. The computer system according to claim 1 , wherein the device comprises a thermal throttling circuit for controlling the clock frequency according to a temperature, the thermal throttling circuit configured to control the clock frequency according to a clock control signal applied to the thermal throttling circuit by the controller. 5. The computer system according to claim 4 , wherein the thermal throttling circuit is further configured to: enable the clock frequency for a predetermined time of a certain period T, and disable the clock frequency for a remaining time of the certain period T. 6. The computer system according to claim 1 , wherein the controller comprises: a first comparator for comparing a voltage level corresponding to the detected temperature with a voltage level corresponding to the first reference value; a second comparator for comparing a voltage level corresponding to the detected current value with a voltage level corresponding to the second reference value; and a logical sum operator comprising: a first input terminal connected to an output terminal of the first comparator, and a second input terminal connected to an output terminal of the second comparator, and wherein the logical sum operator outputs a clock control signal to the device. 7. The computer system according to claim 6 , wherein a same reference voltage level is input to the first comparator and the second comparator. 8. The computer system according to claim 7 , wherein the controller further comprises a scaling factor unit that scales at least one of the voltage level corresponding to the detected temperature and the voltage level corresponding to the detected current value as a dimension of the reference voltage level. 9. A power control method of a computer system that comprises a battery unit and a device operating according to a clock frequency, the power control method comprising: detecting, by a temperature sensor provided at a location outside of the battery unit, a temperature of the battery unit; detecting a value of a current supplied from the battery unit to the device; comparing, by a comparator, the detected temperature with a first reference value or the detected current value with a second reference value; and decreasing the clock frequency if the detected temperature is greater than the first reference value or if the detected current value is greater than the second reference value, wherein the comparing of the detected temperature with the first reference value comprises converting the detected temperature to a first voltage level, wherein the comparing of the detected current value with the second reference value comprises converting the detected current value to a second voltage level, and wherein the first reference value and the second reference value which are input to the comparator comprise a same reference voltage level. 10. The method according to claim 9 , further comprising: controlling the battery unit to stop supplying the power if the detected temperature of the battery unit is greater than a third reference value which is greater than the first reference value. 11. The method according to claim 9 , wherein decreasing the clock frequency comprises decreasing the clock frequency if the detected temperature is maintained for another preset time at a temperature greater than the first reference value. 12. The method according to claim 9 , wherein the device comprises a thermal throttling circuit for controlling the clock frequency according to a temperature, the thermal throttling circuit configured to: enable the clock frequency for a predetermined time of a certain period T, and disable the clock frequency for a remaining time of the certain period T. 13. The method according to claim 9 , further comprising: comparing a voltage level corresponding to the detected temperature of the battery unit with a voltage level corresponding to a first reference value to yield a first result; comparing a voltage level corresponding to the current output with a voltage level corresponding to a second reference value to yield a second result; summing, by a logical summing operator, the first result and the second result; and outputting a clock control signal by the logical summing operator to the device in response to the summing. 14. The method according to claim 13 , further comprising: scaling the voltage level corresponding to the detected temperature as a dimension of a reference voltage level; and wherein the clock frequency is decreased if the scaled voltage level is greater than the reference voltage level. 15. A computer system, comprising: a device which operates according to a clock frequency; a battery unit, which comprises a plurality of battery cells, for supplying power to the device; a temperature sensor provided at a location outside of the battery unit for detecting a temperature of the battery cells; a current sensor for detecting a value of a current supplied from the battery unit to the device; a comparator configured to compare the detected temperature with a first reference point or the detected current value with a second reference point; and a controller, configured to: output a first clock frequency control signal to the device, if the detected temperature is greater than the first reference point or if the detected current value is greater than the second reference point; and output a second clock frequency control signal to the device, if the detected temperature is maintained for a preset time at a temperature that is lower than the first reference point, after the clock frequency is decreased, wherein the first reference value and the second reference value which are input to the comparator comprise a same reference voltage level, wherein the comparing of the detected tem

Assignees

Inventors

Classifications

  • G06F1/206Primary

    comprising thermal management · CPC title

  • G06F1/324Primary

    by lowering clock frequency · CPC title

  • Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations (for resetting only G06F1/24) · CPC title

  • Supervision thereof, e.g. detecting power-supply failure by out of limits supervision · CPC title

  • G06F1/26Primary

    Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

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What does patent US9405352B2 cover?
A computer system is provided. The computer system includes a device which operates according to a clock frequency, a battery unit, which comprises a plurality of battery cells, for supplying power to the device, a temperature sensor provided at a location outside of the battery unit for detecting a temperature of the battery cells, a current sensor coupled to the battery unit for detecting a v…
Who is the assignee on this patent?
Samsung Electronics Co Ltd, Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F1/206. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 02 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).