Background calibration of time-interleaved analog-to-digital converters

Patent metadata

Field	Value
Publication number	US-9401726-B2
Application number	US-201414554790-A
Country	US
Kind code	B2
Filing date	Nov 26, 2014
Priority date	Nov 26, 2014
Publication date	Jul 26, 2016
Grant date	Jul 26, 2016

Abstract

A robust and fast background calibration technique for correction of time-interleaved ADC offset, gain, bandwidth, and timing mismatches is proposed. The technique combines the use of a calibration signal and a reference ADC. The calibration signal enhances robustness and makes the technique independent of the input signal's statistics. The reference ADC speeds up convergence and enables the use of a small amplitude calibration signal that does not significantly reduce the input signal dynamic range. The calibration signal can be subtracted or filtered from the ADC output and is therefore invisible to the ADC user.

First claim

What is claimed is:

1. A time interleaved analog-to-digital converter (ADC) comprising:
a reference ADC coupled to receive an analog input signal combined with a calibration signal;
a plurality of sub-ADCs coupled to receive the analog input signal combined with the calibration signal, the sub-ADCs configured to sample the analog input signal combined with the calibration signal using respective sample clock signals; and
a plurality of calibration circuits coupled to the refer…

Assignees

• Silicon Lab Inc

Inventors

• Ragab Kareem A
• Khoury John

Classifications

• H03M1/0626

  Electricity · mapped topic

• H03M1/121

  Electricity · mapped topic

• H03M1/1023 Primary

  Electricity · mapped topic

• H03M1/0695

  Electricity · mapped topic

• H03M2201/4233

  Electricity · mapped topic