Frequency synthesizers with amplitude control

Patent metadata

Field	Value
Publication number	US-9401724-B1
Application number	US-201514836823-A
Country	US
Kind code	B1
Filing date	Aug 26, 2015
Priority date	Aug 26, 2015
Publication date	Jul 26, 2016
Grant date	Jul 26, 2016

Abstract

A frequency synthesizer device provides amplitude control. Using switch circuit operating in a first mode, a charge voltage is applied to an oscillator circuit that an inductive-capacitive (LC) tank circuit. The LC tank circuit has a capacitive element, and an inductive element that is connected to the capacitive element. Using the switch circuit operating in a second mode, the LC tank circuit is enabled to oscillate. Using driver circuits that are response to a voltage applied to the tank circuit, current is reinforced in the LC tank, and the reinforcement is based upon a transconductance gain of the driver circuits. Using a calibration circuit, an amplitude of an output signal from the oscillator circuit is detected. In response to the detected amplitude, the transconductance gain is adjusted by enabling or disabling auxiliary circuits from plurality of auxiliary circuits.

First claim

What is claimed is:

1. A frequency synthesizer device with amplitude control, the device comprising:
an oscillator circuit having:
an inductive-capacitive (LC) tank circuit having:
a capacitive element, and
an inductive element that is connected to the capacitive element;
driver circuits that are configured to reinforce oscillation to generate output signal that oscillates in response to voltage applied to the tank circuit and a transconductance gain provided to the oscillator circuit;
a switch circuit that is configured to operate in a first mode in which the capacitive element of the oscillator circuit is held at a charge voltage that corresponds to a supply voltage and in a second mode in which the tank circuit oscillates, wherein the switch circuit includes a switch that prevents current from flowing through the inductive element in the first mode; and
a plurality of auxiliary circuits that are each configured to adjust, in response to being enabled, an amplitude of the output signal by changing the transconductance gain provided to the oscillator circuit; and
a calibration circuit configured to detect an amplitude of the output signal, and adjust, in response to the detected amplitude, how many of the plurality of auxiliary circuits are enabled.

2. The device of claim 1 , wherein the calibration circuit is further configured to adjust the amplitude of the output signal based upon a difference between the detected amplitude of the output signal and an amplitude of the charge voltage.

3. The device of claim 1 , wherein the calibration circuit is further configured to set, before entering the second mode, how many of the plurality of auxiliary circuits are enabled based upon a value for a frequency control word (FCW) of the frequency synthesizer device.

4. The device of claim 3 , wherein the calibration circuit is further configured to enable all of the auxiliary circuits in response to the value for the FCW indicating that the frequency synthesizer device is operating in a lower band (LB) and to enable only half of the auxiliary circuits in response to the FCW indicating that the frequency synthesizer device is operating in a higher band (HB).

5. The device of claim 1 , wherein the calibration circuit is further configured to determine whether the amplitude of the output signal is within a threshold range defined by low and high threshold voltages.

6. The device of claim 5 , further comprising a peak detector circuit configured to generate first and second peak detector output signals that are both referenced to a third peak detector output signal.

7. The device of claim 6 , further comprising finite state machines for outer and inner loops that are configured to control timing for the enablement of the peak detector circuit.

8. A method for use with frequency synthesizer device with amplitude control, the method comprising:
applying, using switch circuit operating in a first mode, a charge voltage to an oscillator circuit having:
an inductive-capacitive (LC) tank circuit having:
a capacitive element, and
an inductive element that is connected to the capacitive element;
enabling, using the switch circuit operating in a second mode, the LC tank circuit to oscillate;
reinforcing, using driver circuits that are response to a voltage applied to the tank circuit, current in the LC tank, the reinforcement based upon a transconductance gain of the driver circuits;
detecting, using a calibration circuit, an amplitude of an output signal from the oscillator circuit; and
adjusting, in response to the detected amplitude, the transconductance gain by enabling or disabling auxiliary circuits from plurality of auxiliary circuits, wherein adjusting the transconductance gain includes changing an effective width for transistors in the switchable inverter circuits.

9. The method of claim 8 , further comprising determining that the detected amplitude of the output the signal is within a voltage range.

10. The method of claim 9 , wherein the voltage range is defined by a high threshold voltage and low threshold voltage that are each based upon the charge voltage.

11. The method of claim 8 , further comprising adjusting a frequency of oscillation for the oscillator circuit and further adjusting, in response to a second detected amplitude at the adjusted frequency of oscillation, the transconductance gain.

12. The method of claim 11 , further comprising further adjusting the frequency of oscillation for the oscillator circuit after the further adjusting of the transconductance gain.

13. The method of claim 8 , wherein the auxiliary circuits include transistors that, when enabled, are configured to reinforce the current in the LC tank.

Assignees

• Nxp Bv

Inventors

• Gao Yuan
• Leong Frank
• Staszewski Robert Bogdan

Classifications

• H03B5/06

  Modifications of generator to ensure starting of oscillations · CPC title

• H03B5/1212

  the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair · CPC title

• H03L7/18 Primary

  using a frequency divider or counter in the loop (H03L7/20, H03L7/22 take precedence) · CPC title

• H03L3/00

  Starting of generators · CPC title

• H03B2200/004

  including a variable capacitance, e.g. a varicap, a varactor or a variable capacitance of a diode or transistor · CPC title