Solar cell emitter region fabrication using ion implantation

Patent metadata

Field	Value
Publication number	US-9401450-B2
Application number	US-201414562159-A
Country	US
Kind code	B2
Filing date	Dec 5, 2014
Priority date	Dec 9, 2013
Publication date	Jul 26, 2016
Grant date	Jul 26, 2016

Abstract

Methods of fabricating solar cell emitter regions using ion implantation, and resulting solar cells, are described. In an example, a method of fabricating alternating N-type and P-type emitter regions of a solar cell involves forming a silicon layer above a substrate. Dopant impurity atoms of a first conductivity type are implanted, through a first shadow mask, in the silicon layer to form first implanted regions and resulting in non-implanted regions of the silicon layer. Dopant impurity atoms of a second, opposite, conductivity type are implanted, through a second shadow mask, in portions of the non-implanted regions of the silicon layer to form second implanted regions and resulting in remaining non-implanted regions of the silicon layer. The remaining non-implanted regions of the silicon layer are removed with a selective etch process, while the first and second implanted regions of the silicon layer are annealed to form doped polycrystalline silicon emitter regions.

First claim

What is claimed is:

1. A method of fabricating alternating N-type and P-type emitter regions of a solar cell, the method comprising:
forming a thin dielectric layer on a substrate, wherein the substrate is a monocrystalline silicon substrate; forming a silicon layer on the thin dielectric layer;
implanting, through a first shadow mask, dopant impurity atoms of a first conductivity type in the silicon layer to form first implanted regions and resulting in non-implanted regions of the silicon layer;
implanting, through a second shadow mask, dopant impurity atoms of a second, opposite, conductivity type in portions of the non-implanted regions of the silicon layer to form second implanted regions and resulting in remaining non-implanted regions of the silicon layer;
removing the remaining non-implanted regions of the silicon layer to expose portions of the substrate with a selective etch process preserving the first implanted regions and the second implanted regions of the silicon layer; texturizing the exposed portions of the substrate; and
annealing the first implanted regions and the second implanted regions of the silicon layer to form doped polycrystalline silicon emitter regions.

2. The method of claim 1 , wherein forming the silicon layer comprises forming a hydrogenated amorphous silicon layer.

3. The method of claim 2 , wherein forming the hydrogenated amorphous silicon layer comprises using plasma enhanced chemical vapor deposition (PECVD).

4. The method of claim 1 , wherein removing the remaining non-implanted regions of the silicon layer with the selective etch process comprises using a hydroxide-based wet etchant to texturize exposed portions of the substrate.

5. The method of claim 1 , wherein the implanting through the first and second shadow masks comprises implanting through first and second graphite shadow masks, respectively, and wherein the first and second graphite shadow masks are sequentially positioned off of, but in close proximity to, the silicon layer.

6. The method of claim 1 , further comprising:
forming conductive contacts on the doped polycrystalline silicon emitter regions.

Assignees

• Sunpower Corp

Inventors

• Weidman Timothy
• Smith David D

Classifications

• Y02E10/547

  Monocrystalline silicon PV cells · CPC title

• Y02E10/546

  Polycrystalline silicon PV cells · CPC title

• H10F71/128

  Annealing · CPC title

• H10F71/131

  Recrystallisation; Crystallization of amorphous or microcrystalline semiconductors · CPC title

• H10F71/1221 Primary

  comprising polycrystalline silicon · CPC title