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Semiconductor device and ceramic circuit substrate, and producing method of semiconductor device
US9401340B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9401340-B2 |
| Application number | US-201314433764-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 7, 2013 |
| Priority date | Oct 9, 2012 |
| Publication date | Jul 26, 2016 |
| Grant date | Jul 26, 2016 |
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- Title
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- Abstract
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Abstract
Official abstract text for this publication.
A semiconductor device comprises a circuit layer composed of a conductive material, and a semiconductor element mounted on the circuit layer, wherein an underlayer having a porosity in the range of 5 to 55% is formed on one surface of the circuit layer, a bonding layer composed of a sintered body of a bonding material including an organic substance and at least one of metal particles and metal oxide particles is formed on the underlayer, and the circuit layer and the semiconductor element are bonded together via the underlayer and the bonding layer.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a circuit layer composed of a conductive material; and a semiconductor element mounted on the circuit layer, wherein an underlayer having a porosity in the range of 5 to 42% is formed on one surface of the circuit layer, and includes a glass layer and an Ag layer having glass particles dispersed within the Ag layer, a bonding layer composed of a sintered body of a bonding material including an organic substance and at least one of metal particles and metal oxide particles is formed on the underlayer, and the circuit layer and the semiconductor element are bonded together via the underlayer and the bonding layer. 2. The semiconductor device according to claim 1 comprises: a ceramic circuit substrate having the circuit layer and a ceramic substrate disposed on the other surface of the circuit layer, wherein the semiconductor element is a power semiconductor device. 3. The ceramic circuit substrate used in the semiconductor device according to claim 2 comprises: a circuit layer composed of a conductive material, an underlayer formed on one surface of the circuit layer and including a glass layer and an Ag layer having glass particles dispersed within the Ag layer, and a ceramic substrate disposed on the other surface of the circuit layer, wherein the porosity of the underlayer is in the range of 5 to 42%.
Assignees
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Classifications
between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title
between a chip and a stacked insulating package substrate, interposer or RDL · CPC title
between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title
between a chip and a stacked insulating package substrate, interposer or RDL · CPC title
Encapsulations, e.g. protective coatings · CPC title
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- What does patent US9401340B2 cover?
- A semiconductor device comprises a circuit layer composed of a conductive material, and a semiconductor element mounted on the circuit layer, wherein an underlayer having a porosity in the range of 5 to 55% is formed on one surface of the circuit layer, a bonding layer composed of a sintered body of a bonding material including an organic substance and at least one of metal particles and metal …
- Who is the assignee on this patent?
- Mitsubishi Materials Corp
- What technology area does this patent fall under?
- Primary CPC classification H10W40/255. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jul 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).