Light emitting device

US9397257B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9397257-B2
Application numberUS-201514622361-A
CountryUS
Kind codeB2
Filing dateFeb 13, 2015
Priority dateSep 12, 2012
Publication dateJul 19, 2016
Grant dateJul 19, 2016

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  1. Title

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  5. First independent claim

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Abstract

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The disclosed light emitting device includes an intermediate layer interposed between the light emitting semiconductor structure and the substrate. The light emitting semiconductor structure includes a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer interposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer, wherein the active layer has a multi quantum well structure including at least one period of a pair structure of a quantum barrier layer including Al x Ga (1-x) N (0<x<1) and a quantum well layer including Al y Ga (1-y) N (0<x<y<1), and at least one of the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer includes AlGaN. The intermediate layer includes AlN and has a plurality of air voids formed in the AlN. At least some of the air voids are irregularly aligned and the number of the air voids is 10 7 to 10 10 /cm 2 .

First claim

Opening claim text (preview).

What is claimed is: 1. A light emitting device comprising: a substrate; a light emitting semiconductor structure disposed on the substrate; and an intermediate layer interposed between the light emitting semiconductor structure and the substrate, wherein: the light emitting semiconductor structure comprises a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer interposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer, wherein the active layer has a multi quantum well structure comprising at least one period of a pair structure of a quantum barrier layer and a quantum well layer; the intermediate layer comprises AN and has a plurality of air voids formed in the AN, wherein at least some of the air voids are irregularly aligned; and the number of the air voids is 10 7 /cm 2 to 10 10 /cm 2 . 2. The light emitting device according to claim 1 , wherein at least one of the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer includes AlGaN. 3. The light emitting device according to claim 2 , wherein the first conductivity-type semiconductor layer comprises Al x In y Ga (1-x-y) N (0≦x≦1, 0≦y≦1, and 0≦x+y≦1), and the second conductivity-type semiconductor layer comprises In x Al y Ga 1-x-y N (0≦x≦1, 0≦x≦1, and 0≦x+y≦1). 4. The light emitting device according to claim 1 , wherein the quantum well layer comprises a second conductivity-type dopant. 5. The light emitting device according to 1 , wherein a peak wavelength of light radiated from the light emitting semiconductor structure is in the range of 315 nm to 350 nm. 6. The light emitting device according to claim 1 , wherein the intermediate layer has a thickness of 1.5 μm to 20 μm. 7. The light emitting device according to claim 1 , wherein each of the air voids has a height smaller than a thickness of the intermediate layer by at least 1 μm. 8. The light emitting device according to claim 1 , wherein each of the air voids has a height of 0.5 μm to 19 μm. 9. The light emitting device according to claim 1 , wherein each of the air voids has one end disposed in contact with the interface between the substrate and the intermediate layer or to be spaced apart from the interface and the other end disposed in the intermediate layer. 10. The light emitting device according to claim 9 , wherein a material forming the intermediate layer laterally grows around each of the air voids to merge at an upper portion of the other end of the air void. 11. The light emitting device according to claim 9 , wherein dislocations of the intermediate layer laterally growing around each of the air voids merge at an upper portion of the other end of the air void. 12. The light emitting device according to claim 8 , wherein a distance between one end of each of the air voids and a region of the air void having a maximum width is greater than a distance between the region having the maximum width to the other end of the air void. 13. The light emitting device according to claim 12 , wherein a region of each of the air voids having a maximum width is spaced apart from the interface between the substrate and the intermediate layer and the interface between the intermediate layer and the light emitting structure. 14. The light emitting device according to claim 1 , wherein a difference in thermal expansion rate between the substrate and the intermediate layer is greater than a difference in thermal expansion rate between the intermediate layer and the light emitting structure. 15. The light emitting device according to claim 1 , wherein the number of the air voids is in the range of 10 7 /cm 2 to 10 8 /cm 2 or 10 9 /cm 2 to 10 10 /cm 2 . 16. A light emitting device comprising: a substrate; a light emitting semiconductor structure disposed on the substrate; and an intermediate layer interposed between the light emitting semiconductor structure and the substrate, wherein: the light emitting semiconductor structure comprises a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer interposed between the first conductivity-type semiconductor layer; and a plurality of air voids formed in the intermediate layer, wherein at least some of the air voids are irregularly aligned and the number of the air voids is 10 7 /cm 2 to 10 10 /cm 2 .

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What does patent US9397257B2 cover?
The disclosed light emitting device includes an intermediate layer interposed between the light emitting semiconductor structure and the substrate. The light emitting semiconductor structure includes a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer interposed between the first conductivity-type semiconductor layer and the second …
Who is the assignee on this patent?
Lg Innotek Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10H20/812. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 19 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).