Methods of making a self-aligned channel drift device

Patent metadata

Field	Value
Publication number	US-9397191-B2
Application number	US-201514922308-A
Country	US
Kind code	B2
Filing date	Oct 26, 2015
Priority date	Jun 7, 2013
Publication date	Jul 19, 2016
Grant date	Jul 19, 2016

Abstract

An isolation region is formed in a semiconductor substrate to laterally define and electrically isolate a device region and first and second laterally adjacent well regions are formed in the device region. A gate structure is formed above the device region such that the first well region extends below an entirety of the gate structure and a well region interface formed between the first and second well regions is laterally offset from a drain-side edge of the gate structure. Source and drain regions are formed in the device region such that the source region extends laterally from a source-side edge of the gate structure and across a first portion of the first well region to a first inner edge of the isolation region and the drain region extends laterally from the drain-side edge and across a second portion of the first well region.

First claim

What is claimed:

1. A method, comprising:
forming an isolation region in a semiconductor substrate so as to laterally define and electrically isolate a device region;
forming a first well region doped with a first type of dopant material in said device region;
forming a second well region doped with a second type of dopant material in said device region laterally adjacent to said first well region, wherein said second type of dopant material has an opposite conductivity type f…

Assignees

• Globalfoundries Inc

Inventors

• Ciavatti Jerome
• Liu Yanxiang

Classifications

• H10P95/90

  Electricity · mapped topic

• H10P30/204

  Electricity · mapped topic

• H10P30/21

  Electricity · mapped topic

• H10D84/0156

  Electricity · mapped topic

• H10D84/0151

  Electricity · mapped topic