Deep collector vertical bipolar transistor with enhanced gain

US9397164B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9397164-B2
Application numberUS-201514944481-A
CountryUS
Kind codeB2
Filing dateNov 18, 2015
Priority dateDec 30, 2013
Publication dateJul 19, 2016
Grant dateJul 19, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  5. First independent claim

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Abstract

Official abstract text for this publication.

An integrated circuit and method having a deep collector vertical bipolar transistor with a first base tuning diffusion. A MOS transistor has a second base tuning diffusion. The first base tuning diffusion and the second base tuning diffusion are formed using the same implant.

First claim

Opening claim text (preview).

What is claimed is: 1. An integrated circuit, comprising: a deep collector vertical bipolar transistor further including: an emitter diffusion; a deep well diffusion that forms a collector of the deep collector vertical bipolar transistor; a base diffusion under the emitter diffusion and above collector and electrically isolated from a substrate of the integrated circuit; a first base tuning diffusion in the base diffusion and between emitter diffusion and the collector; a MOS transistor, the MOS transistor further including: a MOS gate dielectric layer; a MOS gate; a MOS source wherein the doping type of the MOS source is the same as the doping type of the emitter diffusion; a MOS drain; and a second base tuning diffusion under the MOS gate and under the MOS source and under the MOS drain wherein the second base tuning diffusion is sufficiently below the MOS source and MOS drain so MOS source and drain capacitance and breakdown voltage remain within specification limits. 2. The integrated circuit of claim 1 , wherein the MOS transistor is an NMOS transistor and the deep collector vertical bipolar transistor is a deep collector vertical NPN bipolar transistor and wherein the base tuning diffusion is a p-type base tuning diffusion. 3. The integrated circuit of claim 1 , wherein the MOS transistor is a PMOS transistor and the deep collector vertical bipolar transistor is a deep collector vertical PNP bipolar transistor and wherein the base tuning diffusion is an n-type base tuning diffusion. 4. The integrated circuit of claim 1 , wherein a doping of the base tuning diffusion is in the range of about 1E12/cm 3 and 1E13/cm 3 . 5. The integrated circuit of claim 1 , wherein a doping of the base tuning diffusion is in the range of about 1E12/cm 3 and 1E13/cm 3 and is implanted with an energy between about 60 keV and 140 keV.

Assignees

Inventors

Classifications

  • Through-implantation · CPC title

  • into Group IV semiconductors · CPC title

  • into semiconductor materials, e.g. for doping · CPC title

  • Combinations of FETs or IGBTs with BJTs · CPC title

  • having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  (lightly doped source or drain extensions for TFTs H10D30/6715) · CPC title

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Frequently asked questions

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What does patent US9397164B2 cover?
An integrated circuit and method having a deep collector vertical bipolar transistor with a first base tuning diffusion. A MOS transistor has a second base tuning diffusion. The first base tuning diffusion and the second base tuning diffusion are formed using the same implant.
Who is the assignee on this patent?
Texas Instruments Inc
What technology area does this patent fall under?
Primary CPC classification H10D62/177. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 19 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).