Semiconductor device

US9397149B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9397149-B2
Application numberUS-201414581089-A
CountryUS
Kind codeB2
Filing dateDec 23, 2014
Priority dateDec 27, 2013
Publication dateJul 19, 2016
Grant dateJul 19, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device that includes a first flexible substrate, a first bonding layer over the first flexible substrate, a first insulating film over the first bonding layer, a first element layer over the first insulating film, a second element layer over the first element layer, a second insulating film over the second element layer, a second bonding layer over the second insulating film, and a second flexible substrate over the second bonding layer is provided. The first element layer includes a pixel portion and a circuit portion. The pixel portion includes a display element and a first transistor, and the circuit portion includes a second transistor. The second element layer includes a coloring layer and a light-blocking layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A display device comprising: a first flexible substrate; a first bonding layer over the first flexible substrate; a first insulating film over the first bonding layer; a first element layer over the first insulating film; a second element layer over the first element layer; a second insulating film over the second element layer; a second bonding layer over the second insulating film; and a second flexible substrate over the second bonding layer…

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Frequently asked questions

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What does patent US9397149B2 cover?
A display device that includes a first flexible substrate, a first bonding layer over the first flexible substrate, a first insulating film over the first bonding layer, a first element layer over the first insulating film, a second element layer over the first element layer, a second insulating film over the second element layer, a second bonding layer over the second insulating film, and a se…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D86/423. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 19 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).