Organic light-emitting diode display with double gate transistors

Patent metadata

Field	Value
Publication number	US-9397124-B2
Application number	US-201414559618-A
Country	US
Kind code	B2
Filing date	Dec 3, 2014
Priority date	Dec 3, 2014
Publication date	Jul 19, 2016
Grant date	Jul 19, 2016

Abstract

An organic light-emitting diode display may have an array of pixels. Each pixel may have an organic light-emitting diode and thin-film transistor circuitry that controls current flow through the organic light-emitting diode. The thin-film transistor circuitry may include silicon thin-film transistors and semiconducting-oxide thin-film transistors. Double gate transistor structures may be formed in the transistors of the thin-film transistor circuitry. A double gate transistor may have a semiconductor layer sandwiched between first and second dielectric layers. The first dielectric layer may be interposed between an upper gate and the semiconductor layer and the second dielectric layer may be interposed between a lower gate and the semiconductor layer. Capacitor structures may be formed from the layers of metal used in forming the upper and lower gates and other conductive structures.

First claim

What is claimed is:

1. A display, comprising:
an array of pixels each of which has an organic light-emitting diode having an anode and a cathode and each of which has thin-film transistor circuitry with transistors including at least one transistor having a semiconductor layer interposed between an upper gate and a lower gate, wherein the thin-film transistor circuitry includes a source-drain layer that forms source-drain terminals for the transistor, wherein the upper gate is formed from a metal layer, wherein a portion of the metal layer forms a first electrode for a capacitor, and wherein a portion of the source-drain layer forms a second electrode for the capacitor;
horizontal control lines that are coupled to gates in the transistors and that supply control signals to rows of the pixels in the array; and
data lines associated with columns of the pixels in the array.

2. The display defined in claim 1 wherein the thin-film transistor circuitry includes a first dielectric layer between the upper gate and the semiconductor layer and a second dielectric layer between the lower gate and the semiconductor layer.

3. The display defined in claim 2 wherein the first dielectric layer covers the source-drain terminals.

4. The display defined in claim 3 further comprising an additional transistor having source-drain terminals formed from the source-drain layer.

5. The display defined in claim 4 wherein the transistor comprises a semiconducting oxide transistor and wherein the semiconductor layer comprises a semiconducting oxide.

6. The display defined in claim 5 wherein the additional transistor comprises a silicon transistor having a silicon layer.

7. The display defined in claim 6 wherein the additional transistor has a gate formed from a gate layer and wherein the thin-film transistor circuitry comprises a gate insulator layer interposed between the gate and the silicon layer.

8. The display defined in claim 7 further comprising a third dielectric layer, wherein the second and third dielectric layers are interposed between the gate of the additional transistor and the source-drain layer.

9. The display defined in claim 8 wherein the lower gate is interposed between the second and third dielectric layers.

10. The display defined in claim 1 further comprising:
initialization voltage lines associated with columns of the pixels in the array, wherein in each pixel the transistor that has the semiconductor layer interposed between the upper gate and the lower gate couples one of the voltage initialization lines to the anode of the organic light-emitting diode in that pixel.

11. The display defined in claim 10 further comprising:
a metal anode layer that is patterned to form the anodes, wherein the thin-film transistor circuitry includes a metal layer that is not formed from a portion of the metal anode layer and that is patterned to form the voltage initialization lines.

12. An organic light-emitting diode pixel circuit, comprising:
an organic light-emitting diode; and
thin-film transistor circuitry including at least one silicon transistor and at least one semiconducting oxide transistor, wherein the semiconducting oxide transistor has an upper gate and a lower gate and has a semiconducting oxide layer between the upper gate and the lower gate.

13. The organic light-emitting diode pixel circuit defined in claim 12 further comprising a first dielectric layer between the upper gate and the semiconducting oxide layer and a second dielectric layer between the lower gate and the semiconducting oxide layer.

14. An organic light-emitting diode pixel circuit, comprising:
a capacitor having first and second electrodes; and
a thin-film transistor having a semiconductor layer, an upper gate, a first dielectric layer between the upper gate and the semiconductor layer, a lower gate, and a second dielectric layer between the lower gate and the semiconductor layer, wherein the second electrode and the lower gate are formed from first and second portions of a common metal layer.

15. The organic light-emitting diode pixel circuit defined in claim 14 wherein the semiconductor layer comprises a semiconducting oxide layer.

Assignees

• Apple Inc

Inventors

• Choi Jae Won
• Kim Minkyu
• Chang Shih Chang
• Park Young Bae
• Zhong John Z

Classifications

• H10D30/6734

  having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs · CPC title

• H10D86/423

  comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

• H10D86/471 Primary

  having different architectures, e.g. having both top-gate and bottom-gate TFTs · CPC title

• H10D86/60 Primary

  wherein the TFTs are in active matrices · CPC title

• H01L27/3248

  Electricity · mapped topic