Optoelectronic component and method for producing same
US-12176444-B2 · Dec 24, 2024 · US
Integrated circuit package configurations to reduce stiffness
US9397019B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9397019-B2 |
| Application number | US-201414189938-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 25, 2014 |
| Priority date | Feb 25, 2014 |
| Publication date | Jul 19, 2016 |
| Grant date | Jul 19, 2016 |
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- Title
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Abstract
Official abstract text for this publication.
Embodiments of the present disclosure are directed towards an integrated circuit (IC) package including a die having a first side and a second side disposed opposite to the first side. The IC package may further include an encapsulation material encapsulating at least a portion of the die and having a first surface that is adjacent to the first side of the die and a second surface disposed opposite to the first surface. In embodiments, the second surface may be shaped such that one or more cross-section areas of the IC package are thinner than one or more other cross-section areas of the IC package. Other embodiments may be described and/or claimed.
First claim
Opening claim text (preview).
What is claimed is: 1. An integrated circuit (IC) package comprising: a die having a first side and a second side disposed opposite to the first side; and an encapsulation material encapsulating at least a portion of the die and having a first surface that is adjacent to the first side of the die and a second surface disposed opposite to the first surface; wherein the second surface has one or more trenches formed therein that have a length as measured in a plane parallel to t…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9397019B2 cover?
- Embodiments of the present disclosure are directed towards an integrated circuit (IC) package including a die having a first side and a second side disposed opposite to the first side. The IC package may further include an encapsulation material encapsulating at least a portion of the die and having a first surface that is adjacent to the first side of the die and a second surface disposed oppo…
- Who is the assignee on this patent?
- Intel Ip Corp
- What technology area does this patent fall under?
- Primary CPC classification H10W72/0198. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jul 19 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).