Air gaps between copper lines

US9396989B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9396989-B2
Application numberUS-201414164874-A
CountryUS
Kind codeB2
Filing dateJan 27, 2014
Priority dateJan 27, 2014
Publication dateJul 19, 2016
Grant dateJul 19, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Methods are described for forming “air gaps” between adjacent copper lines on patterned substrates. The common name “air gap” will be used interchangeably the more technically accurate “gas pocket” and both reflect a variety of pressures and elemental ratios. The gas pockets may be one or more pores within dielectric material located between copper lines. Adjacent copper lines may be bordered by a lining layer and air gaps may extend from one lining layer on one copper line to the lining layer of an adjacent copper line. The gas pockets can have a dielectric constant approaching one, favorably reducing interconnect capacitance compared with typical low-K dielectric materials.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of forming air gaps between copper lines, the method comprising: transferring a patterned substrate into a substrate processing region, wherein the patterned substrate comprises two copper lines separated by a layer of silicon-containing dielectric, wherein a portion of each of the two copper lines is exposed; forming plasma effluents by flowing a fluorine-containing precursor into a remote plasma region separated from the substrate processing region by a showerhead while forming a remote plasma in the remote plasma region; etching the silicon-containing dielectric from between the two copper lines by flowing the plasma effluents into the substrate processing region, wherein an electron temperature in the substrate processing region is less than 0.5 eV during the operation of flowing the plasma effluents into the substrate processing region and wherein the portion of each of the two copper lines is exposed without an overlying liner layer during the etching of the silicon-containing dielectric; and forming a non-conformal layer of silicon oxide on the two copper lines, wherein silicon oxide formed on each copper line grow and join together to trap an air gap between the two copper lines. 2. The method of claim 1 wherein the fluorine-containing precursor comprises a precursor selected from the group consisting of nitrogen trifluoride, hydrogen fluoride, atomic fluorine, diatomic fluorine, carbon tetrafluoride and xenon difluoride. 3. The method of claim 1 wherein the operation of flowing the fluorine-containing precursor into the remote plasma region further comprises flowing a hydrogen-containing precursor into the remote plasma region. 4. The method of claim 3 wherein the hydrogen-containing precursor comprises one of atomic hydrogen, molecular hydrogen, ammonia, a perhydrocarbon and an incompletely halogen-substituted hydrocarbon. 5. The method of claim 1 wherein the silicon-containing dielectric is silicon oxide. 6. The method of claim 1 wherein the operation of flowing the fluorine-containing precursor into the remote plasma region further comprises flowing a nitrogen-and-oxygen-containing precursor into the remote plasma region. 7. The method of claim 6 wherein the nitrogen-and-oxygen-containing precursor comprises one of N 2 O, NO, NO 2 or N 2 O 2 . 8. The method of claim 6 wherein the nitrogen-and-oxygen-containing precursor consists of nitrogen and oxygen. 9. The method of claim 1 wherein the silicon-containing dielectric is silicon nitride. 10. The method of claim 1 wherein the remote plasma is a capacitively-coupled plasma. 11. The method of claim 1 wherein the two copper lines are bordered by a lining layer and the air gap extends to the lining layer bordering each of the two copper lines. 12. A method of forming air gaps between copper lines, the method comprising: transferring a patterned substrate into a first substrate processing region, wherein the patterned substrate comprises two copper lines separated by a layer of silicon nitride and a layer of silicon oxide on top of the layer of silicon nitride, wherein a portion of each of the two copper lines is exposed prior to transferring the patterned substrate into the substrate processing region; forming first plasma effluents by flowing NF 3 and NH 3 into a first remote plasma region separated from the first substrate processing region by a showerhead while forming a first plasma in the first remote plasma region; etching the overlying layer of silicon oxide from between the two copper lines by flowing the first plasma effluents into the first substrate processing region, wherein the portion of each of the two copper lines is exposed without an overlying liner layer during the etching of the overlying layer of silicon oxide; producing second plasma effluents by flowing NF 3 and N 2 O into a second remote plasma disposed separated from a second substrate processing region by a showerhead while forming a second plasma in the second remote plasma region; etching the layer of silicon nitride from between the two copper lines by flowing the second plasma effluents into the second substrate processing region, wherein the portion of each of the two copper lines is exposed without an overlying liner layer during the etching of the layer of silicon nitride; and forming a non-conformal layer of silicon oxide on the two copper lines, wherein silicon oxide formed on each copper line grow and join together to trap an air gap between the two copper lines. 13. The method of claim 12 wherein the first remote plasma region is the second remote plasma region and the first substrate processing region is the second substrate processing region. 14. The method of claim 12 wherein the first and second substrate processing regions are located in different substrate processing chambers and the patterned substrate is transferred from the first substrate processing region to the second substrate processing region between the operations of flowing the first plasma effluents and flowing the second plasma effluents. 15. A method of forming air gaps between copper lines, the method comprising: transferring a patterned substrate into a substrate processing region, wherein the patterned substrate comprises two copper lines separated by a layer of silicon-containing dielectric, wherein a portion of each of the two copper lines is exposed prior to transferring the patterned substrate into the substrate processing region; forming plasma effluents by flowing a fluorine-containing precursor into a remote plasma region separated from the substrate processing region by a showerhead while forming a remote plasma in the remote plasma region; etching the silicon-containing dielectric from between the two copper lines by flowing the plasma effluents into the substrate processing region, wherein the portion of each of the two copper lines is exposed without an overlying liner layer during the etching of the silicon-containing dielectric, wherein an electron temperature in the substrate processing region is less than 0.5 eV during the operation of flowing the plasma effluents into the substrate processing region; and forming a non-conformal layer of silicon oxide on the two copper lines, wherein silicon oxide formed on each copper line grow and join together to trap an air gap between the two copper lines.

Assignees

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Classifications

  • by chemical means · CPC title

  • comprising alternated and repeated etching and passivation steps · CPC title

  • by forming openings in the dielectric parts · CPC title

  • in regions recessed from the surface, e.g. in trenches or grooves · CPC title

  • formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI] · CPC title

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What does patent US9396989B2 cover?
Methods are described for forming “air gaps” between adjacent copper lines on patterned substrates. The common name “air gap” will be used interchangeably the more technically accurate “gas pocket” and both reflect a variety of pressures and elemental ratios. The gas pockets may be one or more pores within dielectric material located between copper lines. Adjacent copper lines may be bordered b…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H10W20/072. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 19 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).