Wet chemistry processes for fabricating a semiconductor device with increased channel mobility

Patent metadata

Field	Value
Publication number	US-9396946-B2
Application number	US-201113229266-A
Country	US
Kind code	B2
Filing date	Sep 9, 2011
Priority date	Jun 27, 2011
Publication date	Jul 19, 2016
Grant date	Jul 19, 2016

Abstract

Embodiments of a semiconductor device having increased channel mobility and methods of manufacturing thereof are disclosed. In one embodiment, the semiconductor device includes a substrate including a channel region and a gate stack on the substrate over the channel region. The gate stack includes an alkaline earth metal. In one embodiment, the alkaline earth metal is Barium (Ba). In another embodiment, the alkaline earth metal is Strontium (Sr). The alkaline earth metal results in a substantial improvement of the channel mobility of the semiconductor device.

First claim

What is claimed is:

1. A method of enhancing a channel mobility of a semiconductor device comprising:
providing a silicon carbide substrate comprising a channel region; and
providing a gate stack on the silicon carbide substrate over the channel region, the gate stack comprising a first alkaline earth metal layer, an amorphous wide bandgap dielectric layer over the first alkaline earth metal layer, and a second alkaline earth metal layer over the amorphous wide bandgap dielectric layer;
wherein providing the gate stack on the silicon carbide substrate over the channel region comprises providing the first alkaline earth metal layer directly on the silicon carbide substrate over the channel region using wet chemistry such that the first alkaline earth metal layer is between the silicon carbide substrate and the amorphous wide bandgap dielectric layer thereby enhancing the channel mobility of the semiconductor device.

2. The method of claim 1 wherein one of the first alkaline earth metal layer and the second alkaline earth metal layer is Barium (Ba).

3. The method of claim 1 wherein one of the first alkaline earth metal layer and the second alkaline earth metal layer is Strontium (Sr).

4. The method of claim 1 wherein one of the first alkaline earth metal layer and the second alkaline earth metal layer is an oxide containing the alkaline earth metal.

5. The method of claim 4 wherein the oxide containing the alkaline earth metal is Barium Oxide.

6. The method of claim 4 wherein the oxide containing the alkaline earth metal is Ba X Si Y O Z .

7. The method of claim 1 wherein the first alkaline earth metal layer is an oxynitride containing the alkaline earth metal.

8. The method of claim 7 wherein the oxynitride is BaO X N Y .

9. The method of claim 1 wherein the amorphous wide bandgap dielectric layer is formed of one of a group consisting of: Silicon Dioxide (SiO 2 ), Aluminum Oxide (Al 2 O 3 ), and Hafnium Oxide (HfO).

10. The method of claim 1 wherein at least one of the first alkaline earth metal layer and the second alkaline earth metal layer contains Barium (Ba).

11. The method of claim 1 wherein at least one of the first alkaline earth metal layer and the second alkaline earth metal layer contains Strontium (Sr).

12. The method of claim 1 wherein providing the first alkaline earth metal layer on the surface of the silicon carbide substrate comprises providing the first alkaline earth metal layer directly on the surface of the silicon carbide substrate.

13. The method of claim 1 wherein providing the gate stack on the silicon carbide substrate further comprises providing a gate metal layer on a surface of the second alkaline earth metal layer opposite the amorphous wide bandgap dielectric layer.

14. The method of claim 1 wherein the silicon carbide substrate is one of a group consisting of: a 4H Silicon Carbide (SiC) substrate, a 6H SiC substrate, a 3C SiC substrate, and a 15R SiC substrate.

15. The method of claim 1 wherein the semiconductor device is a lateral Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET), the method further comprising:
providing a source region formed in the silicon carbide substrate; and
providing a drain region formed in the silicon carbide substrate;
wherein providing the gate stack comprises providing the gate stack on the silicon carbide substrate between the source and drain regions.

16. The method of claim 15 wherein the silicon carbide substrate is one of a group consisting of: a 4H Silicon Carbide (SiC) substrate, a 6H SiC substrate, a 3C SiC substrate, and a 15R SiC substrate.

17. The method of fabrication of claim 1 wherein the semiconductor device is a vertical Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET), and the method further comprises:
providing a well of a first conductivity type formed in the substrate, the substrate being of a second conductivity type;
providing a source region of the second conductivity type formed in the substrate, wherein the gate stack is on the substrate and extends over at least a portion of the well and the source region; and
providing a drain contact on a surface of the substrate opposite the gate stack.

18. The method of fabrication of claim 17 wherein the substrate is one of a group consisting of: a 4H Silicon Carbide (SiC) substrate, a 6H SiC substrate, a 3C SiC substrate, and a 15R SiC substrate.

19. The method of fabrication of claim 1 wherein the semiconductor device is an Insulated Gate Bipolar Transistor (IGBT), and the method further comprises:
providing an emitter region formed in the substrate, wherein the gate stack is on the substrate and extends over at least a portion of the emitter region; and
providing a collector contact on a surface of the substrate opposite the gate stack.

20. The method of fabrication of claim 19 wherein the substrate is one of a group consisting of: a 4H Silicon Carbide (SiC) substrate, a 6H SiC substrate, a 3C SiC substrate, and a 15R SiC substrate.

21. The method of fabrication of claim 1 wherein the semiconductor device is a trench field effect transistor, and:
the substrate comprises:
a first layer of a first conductivity type;
a drift layer of the first conductivity type on a first surface of the first layer of the first conductivity type;

a well of a second conductivity type on a surface of the drift layer opposite the first layer;
a source region of the first conductivity type in or on the well;
a source contact on a surface of the source region opposite the well;
a drain contact on a second surface of the first layer opposite the drift layer; and
a trench that extends from the surface of the source region through the well to the surface of the drift layer, wherein the gate stack is formed in the trench.

22. The method of fabrication of claim 21 wherein the substrate is one of a group consisting of: a 4H Silicon Carbide (SiC) substrate, a 6H SiC substrate, a 3C SiC substrate, and a 15R SiC substrate.

23. The method of claim 1 wherein providing the first alkaline earth metal layer on the silicon carbide substrate over the channel region using wet chemistry comprises:
dipping the silicon carbide substrate in a fluid containing the alkaline earth metal; and
drying the silicon carbide substrate such that the layer containing the alkaline earth metal is provided on the silicon carbide substrate.

24. The method of claim 1 wherein providing the first alkaline earth metal layer on the silicon carbide substrate over the channel region using wet chemistry comprises:
dipping the silicon carbide substrate in a fluid containing the alkaline earth metal;
drying the silicon carbide substrate such that a residue comprising the alkaline earth metal is provided on the silicon carbide substrate; and
oxidizing the residue to provide the layer containing the alkaline earth metal.

25. The method of claim 1 wherein providing the first alkaline earth metal layer on the silicon carbide substrate over the channel region using wet chemistry comprises:
spinning a fluid containing the alkaline earth metal onto the silicon carbide substrate; and
drying the silicon carbide substrate such that the layer containing the alkaline earth metal is provided on the silicon carbide substrate.

26. The method of claim 1 wherein providing the first alkaline earth metal layer on the silicon carbide substrate over the channel region using wet c

Assignees

• Dhar Sarit
• Cheng Lin
• Ryu Sei-Hyung
• Agarwal Anant
• Palmour John Williams
• Maki Erik
• Gurganus Jason
• Lichtenwalner Daniel Jenner
• Cree Inc

Inventors

• Dhar Sarit
• Cheng Lin
• Ryu Sei-Hyung
• Agarwal Anant
• Palmour John Williams
• Maki Erik
• Gurganus Jason
• Lichtenwalner Daniel Jenner

Classifications

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/6939

  characterised by the metal · CPC title

• H10P14/6928

  the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides · CPC title

• H10P14/662

  Laminate layers, e.g. stacks of alternating high-k metal oxides (adhesion layers or buffer layers H10P14/6508, H10P14/6548) · CPC title

• H10P14/6938

  the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides · CPC title