Complementary metal oxide semiconductor device with III-V optical interconnect having III-V epitaxially formed material

Patent metadata

Field	Value
Publication number	US-9395489-B2
Application number	US-201414509506-A
Country	US
Kind code	B2
Filing date	Oct 8, 2014
Priority date	Oct 8, 2014
Publication date	Jul 19, 2016
Grant date	Jul 19, 2016

Abstract

An electrical device that in one embodiment includes a first semiconductor device positioned on a first portion of a type IV semiconductor substrate, and an optoelectronic light emission device of type III-V semiconductor materials that is in electrical communication with the first semiconductor device. The optoelectronic light emission device is positioned adjacent to the first semiconductor device on the first portion of the type IV semiconductor substrate. A dielectric waveguide is present on a second portion of the type IV semiconductor substrate. An optoelectronic light detection device of type III-V semiconductor material is present on a third portion of the type IV semiconductor device. The dielectric waveguide is positioned between and aligned with the optoelectronic tight detection device and optoelectronic light emission device to transmit a light signal from the optoelectronic light emission device to the optoelectronic light detection device.

First claim

What is claimed is:

1. An electrical device comprising:
a first semiconductor device positioned on a first portion of a type IV semiconductor substrate;
an optoelectronic light emission device comprising type III-V semiconductor materials that is in electrical communication with the first semiconductor device, wherein the optoelectronic light emission device is positioned adjacent to the first semiconductor device on the first portion of the type IV semiconductor substrate;
a dielectric waveguide present on a second portion of the type IV semiconductor substrate; and
an optoelectronic light detection device comprising type III-V semiconductor material present on a third portion of the type IV semiconductor device, wherein the dielectric waveguide is positioned between and aligned with the optoelectronic light detection device and optoelectronic light emission device to transmit a light signal from the optoelectronic light emission device to the optoelectronic light detection device.

2. The electronic device of claim 1 , wherein the first semiconductor device comprises a switching device selected from the group consisting of field effect transistor (FET), fin field effect transistor (FinFET), metal oxide semiconductor field effect transistor (MOSFET), bipolar junction transistor (BJT), Schottky barrier semiconductor device, junction field effect transistor (JFET) and combinations thereof, or the semiconductor device comprises a memory device selected from the group consisting of flash memory, dynamic random access memory, embedded dynamic random access memory, and combinations thereof.

3. The electronic device of claim 1 , wherein the optoelectronic light emission device is a quantum well laser comprising a first conductivity type III-V semiconductor material layer, a quantum well stack of III-V semiconductor material layers that is present on the first conductivity type III-V semiconductor material layer, and a second conductivity type III-V semiconductor material layer that is present on the quantum well stack of III-V semiconductor material layers.

4. The electronic device of claim 1 , wherein the optoelectronic light detection device includes a first conductivity type III-V semiconductor material layer, an intrinsic III-V semiconductor material layer, and a second conductivity type III-V semiconductor material layer.

5. The electronic device of claim 1 , wherein a first region of a first portion of the type IV semiconductor substrate that the first semiconductor device is positioned on includes an SOI layer, a buried dielectric layer, and a base semiconductor substrate, in which the first semiconductor device is positioned directly on the SOI layer.

6. The electronic device of claim 5 , wherein a second region of the first portion of the type IV semiconductor substrate only includes the base semiconductor substrate, and the optoelectronic light emission device is present directly on a first buffer layer, wherein the first buffer layer is directly on the base semiconductor substrate.

7. The electronic device of claim 6 , wherein the first buffer layer has a lattice dimension between a lattice dimension for the base semiconductor substrate and a first conductivity type III-V semiconductor material layer of the optoelectronic light emission device, the base semiconductor substrate having a composition selected from the group consisting of SiGe, Ge, GaAs, GaAsP and combinations thereof.

8. The electrical device of claim 1 , wherein the optoelectronic light detection device is in electrical communication with a second semiconductor device, wherein the second semiconductor device comprises a switching device selected from the group consisting of field effect transistor (FET), fin field effect transistor (FinFET), metal oxide semiconductor field effect transistor (MOSFET), bipolar junction transistor (BJT), Schottky barrier semiconductor device, junction field effect transistor (JFET), and combinations thereof, or the second semiconductor device comprises a memory device selected from the group consisting of flash memory, dynamic random access memory, embedded dynamic random access memory, and combinations thereof.

9. The electrical device of claim 8 , wherein the dielectric waveguide has a width that tapers from a first face having a first width that is adjacent to the optoelectronic light emission device to a second face having a second width that is adjacent to the optoelectronic light detection device.

10. The electrical device of claim 9 , wherein the dielectric waveguide is comprised of a dielectric material selected from the group consisting of amorphous silicon, polysilicon, poly III-V semiconductor material, aluminum nitride (AlN) and a combination thereof.

11. The electrical device of claim 9 , wherein the second portion of the type IV semiconductor substrate includes the buried dielectric layer, and the base semiconductor substrate, wherein a base of the dielectric waveguide is separated from the buried dielectric layer by at least one layer of an isolation dielectric material.

12. The electric device of claim 1 , wherein the third portion of the type IV semiconductor substrate only includes the base semiconductor substrate, and the optoelectronic light detection device is present directly on a second buffer layer, wherein the second buffer layer is directly on the base semiconductor substrate.

13. The electrical device of claim 12 , wherein the first buffer layer has a lattice dimension between a lattice dimension for the base semiconductor substrate and a first conductivity type III-V semiconductor material layer of the optoelectronic light emission device, the base semiconductor substrate having a composition selected from the group consisting of SiGe, Ge, GaAs, GaAsP and combinations thereof.

14. An electrical device comprising:
a first conductivity semiconductor device positioned on a first portion of a type IV semiconductor substrate;
optoelectronic light emission device comprising type III-V semiconductor materials that is in electrical communication with the first semiconductor device, wherein the optoelectronic light emission device is positioned adjacent to the first conductivity semiconductor device on the first portion of the type IV semiconductor substrate;
a dielectric waveguide present on a second portion of the type IV semiconductor substrate;
an optoelectronic light detection device comprising type III-V semiconductor material present on a third portion of the type IV semiconductor substrate, wherein the dielectric waveguide is positioned between and aligned with the optoelectronic light detection device and optoelectronic light emission device to transmit a light signal from the optoelectronic light emission device to the optoelectronic light detection device; and
a second conductivity semiconductor device positioned on the third portion of the type IV semiconductor substrate, wherein the second conductivity semiconductor device is in electrical communication with the optoelectronic light detection device.

15. The electrical device of claim 14 , wherein the first semiconductor device comprises a first switching device selected from the group consisting of field effect transistor (FET), fin field effect transistor (FinFET), metal oxide semiconductor field effect transistor (MOSFET), bipolar junction transistor (BJT), Schottky barrier semiconductor device, junction field effect transistor (JFET), and combinations thereof, or the first semiconductor device comprises a first memory device selected from the group consisting of flash memory, dynamic random access memory, embedded dynamic random access memory,

Assignees

• IBM

Inventors

• Cheng Cheng-Wei
• Li Ning
• Sadana Devendra K
• Shiu Kuen-Ting

Classifications

• H10D30/83

  FETs having PN junction gate electrodes · CPC title

• H10D30/62

  Fin field-effect transistors [FinFET] · CPC title

• H10D30/60

  Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence) · CPC title

• H10D30/00

  Field-effect transistors [FET] (insulated-gate bipolar transistors H10D12/00) · CPC title

• H10D10/00

  Bipolar junction transistors [BJT] · CPC title