FinFET device and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-9391073-B2
Application number	US-201314397822-A
Country	US
Kind code	B2
Filing date	Aug 6, 2013
Priority date	Jul 2, 2013
Publication date	Jul 12, 2016
Grant date	Jul 12, 2016

Abstract

A FinFET device and a method for manufacturing the same. The FinFET device includes a plurality of fins each extending in a first direction on a substrate; a plurality of gate stacks each being disposed astride the plurality of fins and extending in a second direction; a plurality of source/drain region pairs, respective source/drain regions of each source/drain region pair being disposed on opposite sides of the each gate stack in the second direction; and a plurality of channel regions each comprising a portion of a corresponding fin between the respective source/drain regions of a corresponding source/drain pair, wherein the each fin comprises a plurality of protruding cells on opposite side surfaces in the second direction.

First claim

We claim:

1. A method for manufacturing a FinFET device, comprising:
forming a plurality of fins on a substrate, each of the plurality of fins extending in a first direction;
forming a plurality of protruding cells on opposite side surfaces of each fin in a second direction by performing dry etching and/or wet etching on the side surfaces of each fin;
forming at least one gate stack astride the plurality of fins, each gate stack extending in the second direction; and
forming a pair of source/drain regions in each fin on opposite sides of each gate stack, wherein a portion of each fin between the source/drain regions form a channel region.

2. The method according to claim 1 , wherein process parameters of the dry etching and/or wet etching are controlled such that the plurality of protruding cells each have a cross-section shape selected from a group consisting of a rectangle, triangle, trapezoid, reversed trapezoid, Z-shape, C-shape, D-shape, circle, ellipse, sector, and diamond, or any combination thereof.

3. The method according to claim 1 , wherein the plurality of protruding cells are periodic, and/or continuous, and/or discrete.

4. The method according to claim 1 , wherein the dry etching comprises isotropic plasma dry etching or reactive ion etching having a lateral etching depth or a combination of isotropic dry etching and anisotropic dry etching.

5. The method according to claim 1 , wherein the wet etching comprises selective wet etching having different etching rates in different crystal orientations.

6. The method according to claim 1 , further comprising performing surface treatment and rounding process on the side surfaces of each fin after the plurality of protruding cells are formed.

7. A FinFET device, comprising:
a plurality of fins each extending in a first direction on a substrate;
a plurality of gate stacks each being disposed astride the plurality of fins and extending in a second direction;
a plurality of source/drain region pairs, respective source/drain regions of each source/drain region pair being disposed on opposite sides of each gate stack in the second direction; and
a plurality of channel regions each comprising a portion of a corresponding fin between the respective source/drain regions of a corresponding source/drain pair,
wherein each fin comprises a plurality of similar or identical protruding cells on opposite side surfaces in the second direction which protrude outwardly in a direction from inside the fin toward the surface thereof and formed by performing dry etching and/or wet etching on the side surfaces of each fin.

8. The FinFET device according to claim 7 , wherein the plurality of protruding cells each have a cross-section shape selected from a group consisting of a rectangle, triangle, trapezoid, reversed trapezoid, Σ-shape, C-shape, D-shape, circle, ellipse, sector, and diamond, or any combination thereof.

9. The FinFET device according to claim 7 , wherein the plurality of protruding cells are periodic, and/or continuous, and/or discrete.

Assignees

• Inst Of Microelectronics Cas

Inventors

• Yin Huaxiang
• Ma Xiaolong
• Xu Weijia
• Xu Qiuxia
• Zhu Huilong

Classifications

• H10P50/642

  Chemical etching · CPC title

• H10D84/0158

  the components including FinFETs · CPC title

• H10D84/038

  using silicon technology, e.g. SiGe · CPC title

• H10D30/6213

  having rounded corners · CPC title

• H10D30/6212

  having fin-shaped semiconductor bodies having non-rectangular cross-sections · CPC title