Semiconductor structures including fluidic microchannels for cooling and related methods

Patent metadata

Field	Value
Publication number	US-9391011-B2
Application number	US-201514642196-A
Country	US
Kind code	B2
Filing date	Mar 9, 2015
Priority date	Jun 28, 2012
Publication date	Jul 12, 2016
Grant date	Jul 12, 2016

Abstract

Semiconductor structures are fabricated that include a semiconductor material bonded to a substrate with a layer of dielectric material between the semiconductor material and the substrate. At least one fluidic microchannel extends in a lateral direction through the layer of dielectric material between the semiconductor material and the substrate. The at least one fluidic microchannel includes at least one laterally extending section having a transverse cross-sectional shape entirely surrounded by the layer of dielectric material.

First claim

What is claimed is:

1. A semiconductor structure, comprising:
a substrate;
a first layer of dielectric oxide material disposed over the substrate;
a first layer of semiconductor material disposed over the first layer of dielectric oxide material, the first layer of dielectric oxide material disposed between the first layer of semiconductor material and the substrate, the first layer of semiconductor material having at least one laterally extending recess in a surface of the first layer of semiconductor material on a side thereof opposite the first layer of dielectric oxide material;
at least one fluidic microchannel extending in a lateral direction through the first layer of dielectric oxide material between the first layer of semiconductor material and the substrate, the at least one fluidic microchannel including at least one laterally extending section having a transverse cross-sectional shape entirely surrounded by the first layer of dielectric oxide material;
a second layer of semiconductor material bonded over the first layer of semiconductor material;
another dielectric material disposed between the first layer of semiconductor material and the second layer of semiconductor material and lining the at least one laterally extending recess in the first layer of semiconductor material; and
at least one additional fluidic microchannel extending through the at least one laterally extending recess in the first layer of semiconductor material within the another dielectric material.

2. The semiconductor structure of claim 1 , wherein the first layer of dielectric oxide material comprises a first dielectric oxide material on the substrate and a second dielectric oxide material on the first layer of semiconductor material, the first layer of semiconductor material being bonded to the substrate by direct oxide-to-oxide molecular bonds between the first dielectric oxide material on the substrate and the second dielectric oxide material on the first layer of semiconductor material.

3. The semiconductor structure of claim 2 , wherein the at least one fluidic microchannel is at least partially defined by at least one laterally extending recess in at least one of the first dielectric oxide material and the second dielectric oxide material.

4. The semiconductor structure of claim 3 , wherein the at least one fluidic microchannel is at least partially defined by a first laterally extending recess in the first dielectric oxide material and a second laterally extending recess in the second dielectric oxide material.

5. The semiconductor structure of claim 1 , wherein the first layer of dielectric oxide material comprises silicon oxide.

6. The semiconductor structure of claim 1 , wherein the first layer of semiconductor material has an average layer thickness in a range extending from about ten nanometers (10 nm) to about one and one-half microns (1.5 μm).

7. The semiconductor structure of claim 6 , wherein the first layer of dielectric oxide material has an average layer thickness in a range extending from about one tenth of a micron (0.1 μm) to about five hundred microns (500 μm).

8. The semiconductor structure of claim 1 , wherein the at least one additional fluidic microchannel includes at least one laterally extending section having a transverse cross-sectional shape entirely surrounded by the another dielectric material.

9. The semiconductor structure of claim 1 , wherein the semiconductor material of the first layer of semiconductor material comprises silicon.

10. The semiconductor structure of claim 1 , further comprising a fluid within the at least one fluidic microchannel.

11. The semiconductor structure of claim 10 , further comprising a liquid within the at least one fluidic microchannel.

12. The semiconductor structure of claim 1 , wherein the semiconductor structure is configured as a heat sink for attachment to a semiconductor device.

13. The semiconductor structure of claim 1 , wherein the semiconductor structure comprises a cooling substrate on which at least a portion of a semiconductor device is fabricated.

14. The semiconductor structure of claim 1 , further comprising at least one vertically oriented electrically conductive via extending through the first layer of dielectric oxide material.

15. The semiconductor structure of claim 1 , further comprising an oxide-to-oxide direct molecular bonding interface within the first layer of dielectric oxide material between the first layer of semiconductor material and the substrate.

16. The semiconductor structure of claim 7 , wherein the semiconductor structure comprises a semiconductor-on-insulator (SOI) structure.

17. The semiconductor structure of claim 1 , further comprising an operational semiconductor device located such that a cooling fluid caused to flow through the at least one fluidic microchannel cools the operational semiconductor device during operation thereof.

18. The semiconductor structure of claim 1 , wherein the substrate comprises a die or wafer.

19. The semiconductor structure of claim 1 , further comprising a direct molecular bonding interface within the another dielectric material disposed between the first layer of semiconductor material and the second layer of semiconductor material.

Assignees

• Soitec Silicon On Insulator

Inventors

• Sadaka Mariam

Classifications

• H10W74/15

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• H10W72/072

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