Power switching control device
US-2018358189-A1 · Dec 13, 2018 · US
US9390872B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9390872-B2 |
| Application number | US-201013516214-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 14, 2010 |
| Priority date | Dec 15, 2009 |
| Publication date | Jul 12, 2016 |
| Grant date | Jul 12, 2016 |
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A method of controlling a current breaking device in a high-voltage electricity network is disclosed. In one aspect, the method includes, for each phase (A, B, C), obtaining missing supply voltages from an acquired supply voltage, performing healthy phase/faulty phase discrimination, conducting voltage analysis by attempted matching of a model over a signal window, choosing a strategy of simple closing or reclosing of the breaking device as a function of choice conditions, calculating a set of optimum reclosing times for each phase in accordance with the chosen strategy, and selecting an optimum time from the proposed optimum times and closing the phases of the current breaking device.
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What is claimed is: 1. A method of controlling a current breaking device in a high-voltage electricity network comprising a generator, a power transformer, a three-phase current transformer, a supply-side single-phase voltage transformer, a line-side three-phase voltage transformer, a circuit-breaker and its control cabinet, and a transmission line, the method comprising for each phase: obtaining missing supply voltages from an acquired supply voltage; performing healthy phase/faulty phase discrimination; conducting voltage analysis by attempted matching of a model over a signal window; choosing a strategy of simple closing or reclosing of the breaking device as a function of choice conditions; calculating a set of optimum reclosing times for each phase in accordance with the chosen strategy; selecting an optimum time from the proposed optimum reclosing times; and closing phases of the current breaking device. 2. A method according to claim 1 , wherein obtaining the supply voltage comprises: acquiring a supply voltage corresponding to a phase; and reconstituting other two supply voltages corresponding to other two phases by calculation. 3. A method according to claim 1 , wherein the healthy phase/faulty phase discrimination comprises: continuously acquiring currents; calculating, over a period of a power frequency, a root means square (RMS) value for each phase and storing the RMS value in memory, in the event of an open instruction, terminating the calculation of the RMS value in progress and comparing the RMS value to an average of n values stored in memory, and if the RMS current value exceeds the average by a value set by parameter(s) and a nominal value I set by parameter(s) of a nominal current I divided by 10 then the phase is considered faulty. 4. A method according to claim 3 , wherein n=100. 5. A method according to claim 3 , wherein, if the open instruction occurs before the n RMS values have been stored in memory, then the healthy phase/faulty phase discrimination is carried out by calculating the current RMS value over the M=round(1/(f 0 *Ts)) points following the occurrence of the open instruction, a phase being considered faulty if the RMS current value exceeds the nominal current value assigned as a parameter allowing a margin of 25%. 6. A method according to claim 1 , wherein the voltage analysis is effected by attempted matching over a signal window of a Prony model (t) that is a sum of three damped sinusoids of amplitudes A′, A″, and A′″, with phases φ′, φ″, and φ′″, frequencies f′, f″, and f′″, and damping factors α′, α″, and α′″: prony( t )= A′·e α′t ·cos(2 ·π·f′t +φ′)+ A″·e α″·t ·cos(2 ·π·f″·t +φ″)+ A′″,·e α′″·t ·cos(2 π·f′″·t +φ′″) the amplitudes A′, A″, and A′″ being classified in decreasing order to favor the highest amplitude mode. 7. A method according to claim 1 , wherein a test comparing the time elapsed between an open instruction and a close instruction to a timeout t 2 is used to distinguish between simple closing and rapid reclosing. 8. A method according to claim 7 , wherein in the event of simple closing on reception of a close instruction, a line side and supply side voltage analysis is effected over an 100 ms signal preceding the instruction and a strategy is chosen and after calculating a set of optimum times according to the strategy there follows a waiting time for resynchronization of the phases. 9. A method according to claim 7 , wherein in the event of rapid reclosing, if a current relative time is greater than a particular timeout t 1 , a line side voltage analysis is effected over a signal in the preceding 100 ms and a strategy is chosen and after calculating a set of optimum times according to that strategy there follows waiting for resynchronization of the phases. 10. A method according to claim 8 , wherein the resynchronization waiting time exit condition for phase A is as follows: SC_x=copy of position of phase x of circuit-breaker, 1=closed, 0=open/CALC_x=global variable accessible in read mode, indicating by a value 1 that the phase x is from now in the waiting on resynchronization step, otherwise 0 SC_B=1 AND SC_C=1 OR SC_B=0 AND CALC_B=1 AND SC_C=1 OR SC_B=1 AND SC_C=0 AND CALC_C=1 OR SC_B=01 AND CALC_B=1 AND SC_C=0 AND CALC_C=1. 11. A method according to claim 6 , wherein the conditions for choosing between the various strategies are as follows: Cond1: (f′ out of range OR A′<Amin) AND (f″ out of range OR A″<Amin) AND (f″′ out of range OR A″′<Amin) AND healthy phase; the “out of range” condition indicating that the frequency in question is not in the range [f 1 f 2 ] or f 0 m ±1%, f 1 and f 2 being parameter frequencies of the application and f 0 m the measured power frequency, Cond2: (f′=f 0 m ±1% AND A′>Amin AND A″<Amin); Cond3: (f 1 <f′<f 2 AND A′>Amin AND A″<β*A′); Cond4: (A′>Amin AND A″>β*A′); Cond5: t 0 not found OR line voltage decreases too fast after t 0 , t 0 being the calculated line isolation time; Cond6: Psupply<Amin 2 /2 AND A′>Amin AND f′=f 0 m ±5%; Amin being the minimum amplitude per unit below which an oscillatory mode is no longer considered significant; Psupply being the power of the supply voltage signal, calculated over the same time window as the line side analysis, over N window points, samples Usupply[0] to Usupply [N−1] are available and: Psupply = 1 N * ∑ i = 0 N - 1 Usupply ( i ) 2 the “slow decrease” criterion being such that it is the line voltage (Uline) that is processed, this criterion being satisfied if the M voltage points after t 0 are all greater than or equal to a fraction set by parameter(s) of the voltage at t 0 (M being the number of points corresponding to a period of the power frequency set by parameter(s)): [Uline (t 0 ) . . . Uline (t 0 +M)]>=Uline (t 0 ), the decrease being deemed too fast in the contrary situation; and β being a value between 0 and 1 set by parameter(s). 12. A method according to claim 10 , wherein the simple closing and reclosing strategies are as follows: Strategy 1: minimum or maximum supply voltage, considered sinusoidal at the power frequency, the optimum times being periodic with period 1/f 0 m (f 0 m : measured power frequency); Strategy 2: zero voltage at the terminals, considered sinusoidal at the power frequency, the optimum times being periodic with period 1/(2*f 0 m ); Strategy 3: local minima of beats in the voltage at the terminals, the optimum times being periodic with period 1/(f 0 m −f′); Strategy 4: zero voltage at the terminals, predicted by the complete Prony model, the optimum times not being periodic; Strategies 5 and 7: zero supply voltage, considered sinusoidal at the power frequency, the optimum times being periodic with period 1/(2*f 0 m ); Strateg
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