Executing continuous event processing (CEP) queries in parallel

US9390135B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9390135-B2
Application numberUS-201313770961-A
CountryUS
Kind codeB2
Filing dateFeb 19, 2013
Priority dateFeb 19, 2013
Publication dateJul 12, 2016
Grant dateJul 12, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A continuous event processing (CEP) query processor determines how and when a CEP query can be processed in a concurrent manner, such that multiple threads of execution can concurrently perform at least some of the CEP query's operations concurrently with each other. According to one technique, a user can instruct a CEP query processor to attempt to execute a CEP query in a concurrent manner. The CEP query processor responsively determines whether the CEP query's execution, or parts thereof, can be made concurrent based on certain constraints that can depend on inheritance and operation type. Based on this determination, the CEP query processor can execute at least certain parts of a CEP query in parallel relative to the same event within an event stream.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer-readable memory storing a plurality of instructions for causing a processor to perform operations, the plurality of instructions comprising: instructions that cause the processor to determine that multiple portions of a continuous event processing (CEP) query can be executed concurrently relative to an event in an event stream, the instructions that cause the processor to determine that multiple portions of a continuous event processing (CEP) query can be executed concurrently relative to an event in an event stream comprising: instructions that cause the processor to split the CEP query into a plurality of separate operators; instructions that cause the processor to determine a separate ordering constraint for each particular operator within the plurality of separate operators; instructions that cause the processor to determine an ordering constraint for the CEP query based at least in part on the ordering constraints that the processor determined for the plurality of separate operators; and instructions that cause the processor to determine, based on the ordering constraint for the CEP query, whether the multiple portions of the CEP query can be executed in a concurrent manner; and instructions that cause the processor to execute the multiple portions of the CEP query concurrently against a first event received via the event stream, the instructions that cause the processor to execute the multiple portions of the CEP query concurrently against a first event received via the event stream comprising: instructions that cause the processor to spawn multiple threads of execution that concurrently process the multiple portions of the CEP query against the first event received via the event stream in response to determining that the multiple portions of the CEP query can be executed in a concurrent manner. 2. The computer-readable memory of claim 1 , wherein the instructions that cause the processor to determine the ordering constraint for the CEP query cause the processor to determine the ordering constraint for the CEP query based at least in part on an ordering constraint that is associated with the event stream. 3. The computer-readable memory of claim 1 , wherein the instructions that cause the processor to determine the separate ordering constraint for each particular operator within the plurality of separate operators comprise instructions that cause the processor to determine, for at least one operator of the plurality of separate operators, the ordering constraint for the particular operator based at least in part on one or more constraints of one or more other operators from which the particular operator receives input. 4. The computer-readable memory of claim 1 , wherein the instructions that cause the processor to determine the separate ordering constraint for each particular operator within the plurality of separate operators comprise instructions that cause the processor to determine, for a particular operator of the plurality of separate operators, the ordering constraint for the particular operator based at least in part on whether an operation type of the particular operator is a filtering operation type. 5. The computer-readable memory of claim 1 , wherein the instructions that cause the processor to determine the separate ordering constraint for each particular operator within the plurality of separate operators comprise instructions that cause the processor to determine, for a particular operator of the plurality of separate operators, the ordering constraint for the particular operator by determining a most constrained constraint within a set of constraints including (a) constraints of all other operators from which the particular operator receives input and (b) a constraint associated with an operation type of the particular operator. 6. The computer-readable memory of claim 1 , wherein the plurality of instructions further comprise: instructions that cause the processor to merge, into a single shared operator, (a) a first operator that is used by a first CEP query that processes events in the event stream, and (b) a second operator that is used by a second CEP query that also processes events in the event stream, in response to determining that the first operator and the second operator both perform a particular type of operation. 7. The computer-readable memory of claim 1 , wherein the plurality of instructions further comprise: instructions that cause the processor to merge, into a single shared operator, (a) a first operator that is used by a first CEP query that processes events in the event stream, and (b) a second operator that is used by a second CEP query that also processes events in the event stream, in response to determining that the first operator and the second operator both perform a particular type of operation; wherein the instructions that cause the processor to determine the separate ordering constraint for each particular operator within the plurality of separate operators comprise instructions that cause the processor to determine the ordering constraint for a third operator, which receives input from the shared operator, based at least in part on the ordering constraint of the shared operator; wherein the instructions that cause the processor to determine the separate ordering constraint for each particular operator within the plurality of separate operators comprise instructions that cause the processor to determine the ordering constraint for a fourth operator, which receives input from the shared operator, based at least in part on the ordering constraint of the shared operator; wherein the third operator is used by the first CEP query and is not used by the second CEP query; wherein the fourth operator is used by the second CEP query and is not used by the first CEP query. 8. A system for processing a data stream of events, the system comprising: a memory storing a plurality of instructions; and a processor coupled to the memory, the processor configured to execute the plurality of instructions to: determine that multiple portions of a continuous event processing (CEP) query can be executed concurrently relative to an event in an event stream, the instructions to determine that multiple portions of a continuous event processing (CEP) query can be executed concurrently relative to an event in an event stream comprising instructions to: split the CEP query into a plurality of separate operators; determine a separate ordering constraint for each particular operator within the plurality of separate operators; determine an ordering constraint for the CEP query based at least in part on the ordering constraints that the processor determined for the plurality of separate operators; and determine, based on the ordering constraint for the CEP query, whether the multiple portions of the CEP query can be executed in a concurrent manner; and execute the multiple portions of the CEP query concurrently against a first event received via the event stream, the instructions to execute the multiple portions of the CEP query concurrently against a first event received via the event stream comprising instructions to: spawn multiple threads of execution that concurrently process the multiple portions of the CEP query against the first event received via the event stream in response to determining that the multiple portions of the CEP query can be executed in a concurrent manner. 9. The system of claim 8 , wherein the processor is configured to determine the ordering constraint for the CEP query further based at least in part on an ordering constraint that is associated with the event stream. 10. The system of claim 8 , wherein the processor i

Assignees

Inventors

Classifications

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9390135B2 cover?
A continuous event processing (CEP) query processor determines how and when a CEP query can be processed in a concurrent manner, such that multiple threads of execution can concurrently perform at least some of the CEP query's operations concurrently with each other. According to one technique, a user can instruct a CEP query processor to attempt to execute a CEP query in a concurrent manner. T…
Who is the assignee on this patent?
Oracle Int Corp
What technology area does this patent fall under?
Primary CPC classification G06F16/24568. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 12 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).