Pulsed current sensing

Patent metadata

Field	Value
Publication number	US-9389617-B2
Application number	US-201313770975-A
Country	US
Kind code	B2
Filing date	Feb 19, 2013
Priority date	Feb 19, 2013
Publication date	Jul 12, 2016
Grant date	Jul 12, 2016

Abstract

A system and method are provided for sensing current. A current source is configured to generate a current and a pulsed sense enable signal is generated. A sense voltage across a resistive sense mechanism is sampled according to the sense enable signal, where the sense voltage represents a measurement of the current. A system includes the current source and a current sensing unit. The current source is configured to generate a current. The current sensing unit is coupled the current source and is configured to generate a pulsed sense enable signal and sample the sense voltage across a resistive sense mechanism according to the pulsed sense enable signal.

First claim

What is claimed is:

1. A method, comprising:
configuring a current source to generate a current by alternately enabling a first switching mechanism to couple the current source to an electric power source while disabling a second switching mechanism to decouple the current source from a current sink and then disabling the first switching mechanism to decouple the current source from the electric power source while enabling the second switching mechanism to couple the current source to the current sink;
generating a pulsed sense enable signal; and
sampling a sense voltage across a resistive sense mechanism according to the pulsed sense enable signal while the current source is coupled to the electric power source, wherein the sense voltage represents a measurement of the current.

2. The method of claim 1 , wherein the resistive sense mechanism comprises a metal-oxide semiconductor (MOS) transistor.

3. The method of claim 2 , wherein the resistive sense mechanism further comprises a resistor coupled in series with the MOS transistor.

4. The method of claim 1 , wherein the resistive sense mechanism further comprises a bypass mechanism that is enabled by the pulsed sense enable signal.

5. The method of claim 4 , wherein the bypass mechanism comprises at least one MOS transistor having lower resistance compared with the resistive sense mechanism.

6. The method of claim 1 , wherein the resistive sense mechanism further comprises a bypass mechanism and the pulsed sense enable signal is configured to enable the resistive sense mechanism to sample the sense voltage before enabling the bypass mechanism.

7. The method of claim 1 , wherein the enabling and disabling of the first switching mechanism and the enabling and disabling of the second switching mechanism is based on the sense voltage.

8. The method of claim 1 , wherein the generating of the pulsed sense enable signal comprises pulsing the pulsed sense enable signal during a time when the first switching mechanism is enabled.

9. The method of claim 8 , wherein the generating of the sense enable signal further comprises:
pulsing the pulsed sense enable signal to produce a first sample; and
pulsing the pulsed sense enable signal to produce a second sample when the first sample indicates that the current has not reached a peak value.

10. The method of claim 8 , wherein the generating of the sense enable signal further comprises:
pulsing the pulsed sense enable signal to produce a first sample;

pulsing the pulsed sense enable signal to produce a second sample; and
predicting a time when the current will reach a peak value based on the first sample and the second sample.

11. The method of claim 7 , wherein the generating of the pulsed sense enable signal comprises pulsing the pulsed sense enable signal during a time when the first switching mechanism is enabled and the current source is decoupled from a load.

12. The method of claim 1 , wherein the pulsed sense enable signal is asserted when the current is decoupled from a load.

13. The method of claim 1 , wherein, prior to the sampling, the pulsed sense enable signal enables the resistive sense mechanism.

14. The method of claim 1 , further comprising adjusting an amount of the current that is generated by the current source based on a comparison between a reference voltage and the sense voltage.

15. The method of claim 14 , wherein the reference voltage is set according to a processing workload.

16. The method of claim 1 , wherein the current is greater than an average current that is needed to regulate an output voltage level at a load.

17. The method of claim 1 , wherein the current source comprises an inductor.

18. An electric power conversion device, comprising:
a current source that is configured to generate a current by alternately enabling a first switching mechanism to couple the current source to an electric power source while disabling a second switching mechanism to decouple the current source from a current sink and then disabling the first switching mechanism to decouple the current source from the electric power source while enabling the second switching mechanism to couple the current source to the current sink; and
a current sensing unit that is coupled to the current source and configured to:
generate a pulsed sense enable signal; and
sample a sense voltage across a resistive sense mechanism according to the pulsed sense enable signal while the current source is coupled to the electric power source, wherein the sense voltage represents a measurement of the current.

19. The electric power conversion device of claim 18 , further comprising an upstream controller that is configured to:
couple the current source to the electric power source to increase the current; and
decouple the current source from the electric power source to decrease the current.

20. The electric power conversion device of claim 18 , wherein the resistive sense mechanism further comprises a bypass mechanism that is enabled by the pulsed sense enable signal.

Assignees

• Nvidia Corp

Inventors

• Dally William J

Classifications

• H02M3/156 Primary

  with automatic control of output voltage or current, e.g. switching regulators · CPC title

• H02M2001/0009

  Electricity · mapped topic

• G06F1/305

  in the event of power-supply fluctuations · CPC title

• G05F1/10 Primary

  Regulating voltage or current  (G05F1/02 takes precedence) · CPC title

• G01R27/14

  Measuring resistance by measuring current or voltage obtained from a reference source (G01R27/16, G01R27/20, G01R27/22 take precedence) · CPC title